1 /** 2 Based on IndustryStandard/Acpi10.h, original notice: 3 4 ACPI 1.0b definitions from the ACPI Specification, revision 1.0b 5 6 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved. 7 This program and the accompanying materials are licensed and made available under 8 the terms and conditions of the BSD License that accompanies this distribution. 9 The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php. 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 **/ 15 module uefi.acpi10; 16 import uefi.base; 17 import uefi.base_type; 18 public import uefi.acpiaml; 19 20 public: 21 extern (C): 22 23 /// Common table header, this prefaces all ACPI tables, including FACS, but 24 /// excluding the RSD PTR structure. 25 struct EFI_ACPI_COMMON_HEADER 26 { 27 UINT32 Signature; 28 UINT32 Length; 29 } 30 /// The common ACPI description table header. This structure prefaces most ACPI tables. 31 struct EFI_ACPI_DESCRIPTION_HEADER 32 { 33 align(1): 34 UINT32 Signature; 35 UINT32 Length; 36 UINT8 Revision; 37 UINT8 Checksum; 38 UINT8[6] OemId; 39 UINT64 OemTableId; 40 UINT32 OemRevision; 41 UINT32 CreatorId; 42 UINT32 CreatorRevision; 43 } 44 45 enum ACPI_SMALL_ITEM_FLAG = 0x00; 46 enum ACPI_LARGE_ITEM_FLAG = 0x01; 47 enum ACPI_SMALL_IRQ_DESCRIPTOR_NAME = 0x04; 48 enum ACPI_SMALL_DMA_DESCRIPTOR_NAME = 0x05; 49 enum ACPI_SMALL_START_DEPENDENT_DESCRIPTOR_NAME = 0x06; 50 enum ACPI_SMALL_END_DEPENDENT_DESCRIPTOR_NAME = 0x07; 51 enum ACPI_SMALL_IO_PORT_DESCRIPTOR_NAME = 0x08; 52 enum ACPI_SMALL_FIXED_IO_PORT_DESCRIPTOR_NAME = 0x09; 53 enum ACPI_SMALL_VENDOR_DEFINED_DESCRIPTOR_NAME = 0x0E; 54 enum ACPI_SMALL_END_TAG_DESCRIPTOR_NAME = 0x0F; 55 enum ACPI_LARGE_24_BIT_MEMORY_RANGE_DESCRIPTOR_NAME = 0x01; 56 enum ACPI_LARGE_VENDOR_DEFINED_DESCRIPTOR_NAME = 0x04; 57 enum ACPI_LARGE_32_BIT_MEMORY_RANGE_DESCRIPTOR_NAME = 0x05; 58 enum ACPI_LARGE_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR_NAME = 0x06; 59 enum ACPI_LARGE_DWORD_ADDRESS_SPACE_DESCRIPTOR_NAME = 0x07; 60 enum ACPI_LARGE_WORD_ADDRESS_SPACE_DESCRIPTOR_NAME = 0x08; 61 enum ACPI_LARGE_EXTENDED_IRQ_DESCRIPTOR_NAME = 0x09; 62 enum ACPI_LARGE_QWORD_ADDRESS_SPACE_DESCRIPTOR_NAME = 0x0A; 63 enum ACPI_IRQ_NOFLAG_DESCRIPTOR = 0x22; 64 enum ACPI_IRQ_DESCRIPTOR = 0x23; 65 enum ACPI_DMA_DESCRIPTOR = 0x2A; 66 enum ACPI_START_DEPENDENT_DESCRIPTOR = 0x30; 67 enum ACPI_START_DEPENDENT_EX_DESCRIPTOR = 0x31; 68 enum ACPI_END_DEPENDENT_DESCRIPTOR = 0x38; 69 enum ACPI_IO_PORT_DESCRIPTOR = 0x47; 70 enum ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR = 0x4B; 71 enum ACPI_END_TAG_DESCRIPTOR = 0x79; 72 enum ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR = 0x81; 73 enum ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR = 0x85; 74 enum ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR = 0x86; 75 enum ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR = 0x87; 76 enum ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR = 0x88; 77 enum ACPI_EXTENDED_INTERRUPT_DESCRIPTOR = 0x89; 78 enum ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR = 0x8A; 79 enum ACPI_ADDRESS_SPACE_DESCRIPTOR = 0x8A; 80 enum ACPI_ADDRESS_SPACE_TYPE_MEM = 0x00; 81 enum ACPI_ADDRESS_SPACE_TYPE_IO = 0x01; 82 enum ACPI_ADDRESS_SPACE_TYPE_BUS = 0x02; 83 /// Power Management Timer frequency is fixed at 3.579545MHz. 84 enum ACPI_TIMER_FREQUENCY = 3579545; 85 /// The commond definition of QWORD, DWORD, and WORD 86 /// Address Space Descriptors. 87 struct EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR 88 { 89 align(1): 90 UINT8 Desc; 91 UINT16 Len; 92 UINT8 ResType; 93 UINT8 GenFlag; 94 UINT8 SpecificFlag; 95 UINT64 AddrSpaceGranularity; 96 UINT64 AddrRangeMin; 97 UINT64 AddrRangeMax; 98 UINT64 AddrTranslationOffset; 99 UINT64 AddrLen; 100 } 101 102 union ACPI_SMALL_RESOURCE_HEADER 103 { 104 UINT8 Byte; 105 struct Bits 106 { 107 mixin(bitfields!(UINT8, "Length", 3, UINT8, "Name", 4, UINT8, "Type", 1)); 108 } 109 } 110 111 struct ACPI_LARGE_RESOURCE_HEADER 112 { 113 align(1): 114 union Header 115 { 116 UINT8 Byte; 117 struct Bits 118 { 119 mixin(bitfields!(UINT8, "Name", 7, UINT8, "Type", 1)); 120 } 121 } 122 123 UINT16 Length; 124 } 125 /// IRQ Descriptor. 126 struct EFI_ACPI_IRQ_NOFLAG_DESCRIPTOR 127 { 128 align(1): 129 ACPI_SMALL_RESOURCE_HEADER Header; 130 UINT16 Mask; 131 } 132 /// IRQ Descriptor. 133 struct EFI_ACPI_IRQ_DESCRIPTOR 134 { 135 align(1): 136 ACPI_SMALL_RESOURCE_HEADER Header; 137 UINT16 Mask; 138 UINT8 Information; 139 } 140 /// DMA Descriptor. 141 struct EFI_ACPI_DMA_DESCRIPTOR 142 { 143 align(1): 144 ACPI_SMALL_RESOURCE_HEADER Header; 145 UINT8 ChannelMask; 146 UINT8 Information; 147 } 148 /// I/O Port Descriptor 149 struct EFI_ACPI_IO_PORT_DESCRIPTOR 150 { 151 align(1): 152 ACPI_SMALL_RESOURCE_HEADER Header; 153 UINT8 Information; 154 UINT16 BaseAddressMin; 155 UINT16 BaseAddressMax; 156 UINT8 Alignment; 157 UINT8 Length; 158 } 159 /// Fixed Location I/O Port Descriptor. 160 struct EFI_ACPI_FIXED_LOCATION_IO_PORT_DESCRIPTOR 161 { 162 align(1): 163 ACPI_SMALL_RESOURCE_HEADER Header; 164 UINT16 BaseAddress; 165 UINT8 Length; 166 } 167 /// 24-Bit Memory Range Descriptor 168 struct EFI_ACPI_24_BIT_MEMORY_RANGE_DESCRIPTOR 169 { 170 align(1): 171 ACPI_LARGE_RESOURCE_HEADER Header; 172 UINT8 Information; 173 UINT16 BaseAddressMin; 174 UINT16 BaseAddressMax; 175 UINT16 Alignment; 176 UINT16 Length; 177 } 178 /// 32-Bit Memory Range Descriptor 179 struct EFI_ACPI_32_BIT_MEMORY_RANGE_DESCRIPTOR 180 { 181 align(1): 182 ACPI_LARGE_RESOURCE_HEADER Header; 183 UINT8 Information; 184 UINT32 BaseAddressMin; 185 UINT32 BaseAddressMax; 186 UINT32 Alignment; 187 UINT32 Length; 188 } 189 /// Fixed 32-Bit Fixed Memory Range Descriptor 190 struct EFI_ACPI_32_BIT_FIXED_MEMORY_RANGE_DESCRIPTOR 191 { 192 align(1): 193 ACPI_LARGE_RESOURCE_HEADER Header; 194 UINT8 Information; 195 UINT32 BaseAddress; 196 UINT32 Length; 197 } 198 /// QWORD Address Space Descriptor 199 struct EFI_ACPI_QWORD_ADDRESS_SPACE_DESCRIPTOR 200 { 201 align(1): 202 ACPI_LARGE_RESOURCE_HEADER Header; 203 UINT8 ResType; 204 UINT8 GenFlag; 205 UINT8 SpecificFlag; 206 UINT64 AddrSpaceGranularity; 207 UINT64 AddrRangeMin; 208 UINT64 AddrRangeMax; 209 UINT64 AddrTranslationOffset; 210 UINT64 AddrLen; 211 } 212 /// DWORD Address Space Descriptor 213 struct EFI_ACPI_DWORD_ADDRESS_SPACE_DESCRIPTOR 214 { 215 align(1): 216 ACPI_LARGE_RESOURCE_HEADER Header; 217 UINT8 ResType; 218 UINT8 GenFlag; 219 UINT8 SpecificFlag; 220 UINT32 AddrSpaceGranularity; 221 UINT32 AddrRangeMin; 222 UINT32 AddrRangeMax; 223 UINT32 AddrTranslationOffset; 224 UINT32 AddrLen; 225 } 226 /// WORD Address Space Descriptor 227 struct EFI_ACPI_WORD_ADDRESS_SPACE_DESCRIPTOR 228 { 229 align(1): 230 ACPI_LARGE_RESOURCE_HEADER Header; 231 UINT8 ResType; 232 UINT8 GenFlag; 233 UINT8 SpecificFlag; 234 UINT16 AddrSpaceGranularity; 235 UINT16 AddrRangeMin; 236 UINT16 AddrRangeMax; 237 UINT16 AddrTranslationOffset; 238 UINT16 AddrLen; 239 } 240 /// Extended Interrupt Descriptor 241 struct EFI_ACPI_EXTENDED_INTERRUPT_DESCRIPTOR 242 { 243 align(1): 244 ACPI_LARGE_RESOURCE_HEADER Header; 245 UINT8 InterruptVectorFlags; 246 UINT8 InterruptTableLength; 247 UINT32[1] InterruptNumber; 248 } 249 /// The End tag identifies an end of resource data. 250 struct EFI_ACPI_END_TAG_DESCRIPTOR 251 { 252 UINT8 Desc; 253 UINT8 Checksum; 254 } 255 256 enum EFI_ACPI_RESERVED_BYTE = 0x00; 257 enum EFI_ACPI_RESERVED_WORD = 0x0000; 258 enum EFI_ACPI_RESERVED_DWORD = 0x00000000; 259 enum EFI_ACPI_RESERVED_QWORD = 0x0000000000000000; 260 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_WRITE = (1 << 0); 261 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_READ_ONLY = (0 << 0); 262 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_NON_CACHEABLE = (0 << 1); 263 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE = (1 << 1); 264 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_WRITE_COMBINING = (2 << 1); 265 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE = (3 << 1); 266 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_MEMORY = (0 << 3); 267 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_RESERVED = (1 << 3); 268 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_ACPI = (2 << 3); 269 enum EFI_APCI_MEMORY_RESOURCE_SPECIFIC_FLAG_ADDRESS_RANGE_NVS = (3 << 3); 270 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_TRANSLATION = (1 << 5); 271 enum EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_TYPE_STATIC = (0 << 5); 272 enum EFI_ACPI_IRQ_SHARABLE_MASK = 0x10; 273 enum EFI_ACPI_IRQ_SHARABLE = 0x10; 274 enum EFI_ACPI_IRQ_POLARITY_MASK = 0x08; 275 enum EFI_ACPI_IRQ_HIGH_TRUE = 0x00; 276 enum EFI_ACPI_IRQ_LOW_FALSE = 0x08; 277 enum EFI_ACPI_IRQ_MODE = 0x01; 278 enum EFI_ACPI_IRQ_LEVEL_TRIGGERED = 0x00; 279 enum EFI_ACPI_IRQ_EDGE_TRIGGERED = 0x01; 280 enum EFI_ACPI_DMA_SPEED_TYPE_MASK = 0x60; 281 enum EFI_ACPI_DMA_SPEED_TYPE_COMPATIBILITY = 0x00; 282 enum EFI_ACPI_DMA_SPEED_TYPE_A = 0x20; 283 enum EFI_ACPI_DMA_SPEED_TYPE_B = 0x40; 284 enum EFI_ACPI_DMA_SPEED_TYPE_F = 0x60; 285 enum EFI_ACPI_DMA_BUS_MASTER_MASK = 0x04; 286 enum EFI_ACPI_DMA_BUS_MASTER = 0x04; 287 enum EFI_ACPI_DMA_TRANSFER_TYPE_MASK = 0x03; 288 enum EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT = 0x00; 289 enum EFI_ACPI_DMA_TRANSFER_TYPE_8_BIT_AND_16_BIT = 0x01; 290 enum EFI_ACPI_DMA_TRANSFER_TYPE_16_BIT = 0x10; 291 enum EFI_ACPI_IO_DECODE_MASK = 0x01; 292 enum EFI_ACPI_IO_DECODE_16_BIT = 0x01; 293 enum EFI_ACPI_IO_DECODE_10_BIT = 0x00; 294 enum EFI_ACPI_MEMORY_WRITE_STATUS_MASK = 0x01; 295 enum EFI_ACPI_MEMORY_WRITABLE = 0x01; 296 enum EFI_ACPI_MEMORY_NON_WRITABLE = 0x00; 297 /// Root System Description Pointer Structure. 298 struct EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER 299 { 300 align(1): 301 UINT64 Signature; 302 UINT8 Checksum; 303 UINT8[6] OemId; 304 UINT8 Reserved; 305 UINT32 RsdtAddress; 306 } 307 /// RSDT Revision (as defined in ACPI 1.0b specification). 308 enum EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 309 /// Fixed ACPI Description Table Structure (FADT). 310 struct EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE 311 { 312 align(1): 313 EFI_ACPI_DESCRIPTION_HEADER Header; 314 UINT32 FirmwareCtrl; 315 UINT32 Dsdt; 316 UINT8 IntModel; 317 UINT8 Reserved1; 318 UINT16 SciInt; 319 UINT32 SmiCmd; 320 UINT8 AcpiEnable; 321 UINT8 AcpiDisable; 322 UINT8 S4BiosReq; 323 UINT8 Reserved2; 324 UINT32 Pm1aEvtBlk; 325 UINT32 Pm1bEvtBlk; 326 UINT32 Pm1aCntBlk; 327 UINT32 Pm1bCntBlk; 328 UINT32 Pm2CntBlk; 329 UINT32 PmTmrBlk; 330 UINT32 Gpe0Blk; 331 UINT32 Gpe1Blk; 332 UINT8 Pm1EvtLen; 333 UINT8 Pm1CntLen; 334 UINT8 Pm2CntLen; 335 UINT8 PmTmLen; 336 UINT8 Gpe0BlkLen; 337 UINT8 Gpe1BlkLen; 338 UINT8 Gpe1Base; 339 UINT8 Reserved3; 340 UINT16 PLvl2Lat; 341 UINT16 PLvl3Lat; 342 UINT16 FlushSize; 343 UINT16 FlushStride; 344 UINT8 DutyOffset; 345 UINT8 DutyWidth; 346 UINT8 DayAlrm; 347 UINT8 MonAlrm; 348 UINT8 Century; 349 UINT8 Reserved4; 350 UINT8 Reserved5; 351 UINT8 Reserved6; 352 UINT32 Flags; 353 } 354 /// FADT Version (as defined in ACPI 1.0b specification). 355 enum EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION = 0x01; 356 enum EFI_ACPI_1_0_INT_MODE_DUAL_PIC = 0; 357 enum EFI_ACPI_1_0_INT_MODE_MULTIPLE_APIC = 1; 358 enum EFI_ACPI_1_0_WBINVD = BIT0; 359 enum EFI_ACPI_1_0_WBINVD_FLUSH = BIT1; 360 enum EFI_ACPI_1_0_PROC_C1 = BIT2; 361 enum EFI_ACPI_1_0_P_LVL2_UP = BIT3; 362 enum EFI_ACPI_1_0_PWR_BUTTON = BIT4; 363 enum EFI_ACPI_1_0_SLP_BUTTON = BIT5; 364 enum EFI_ACPI_1_0_FIX_RTC = BIT6; 365 enum EFI_ACPI_1_0_RTC_S4 = BIT7; 366 enum EFI_ACPI_1_0_TMR_VAL_EXT = BIT8; 367 enum EFI_ACPI_1_0_DCK_CAP = BIT9; 368 /// Firmware ACPI Control Structure. 369 struct EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE 370 { 371 align(1): 372 UINT32 Signature; 373 UINT32 Length; 374 UINT32 HardwareSignature; 375 UINT32 FirmwareWakingVector; 376 UINT32 GlobalLock; 377 UINT32 Flags; 378 UINT8[40] Reserved; 379 } 380 /// Firmware Control Structure Feature Flags. 381 /// All other bits are reserved and must be set to 0. 382 enum EFI_ACPI_1_0_S4BIOS_F = BIT0; 383 /// Multiple APIC Description Table header definition. The rest of the table 384 /// must be defined in a platform-specific manner. 385 struct EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER 386 { 387 align(1): 388 EFI_ACPI_DESCRIPTION_HEADER Header; 389 UINT32 LocalApicAddress; 390 UINT32 Flags; 391 } 392 /// MADT Revision (as defined in ACPI 1.0b specification). 393 enum EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION = 0x01; 394 /// Multiple APIC Flags 395 /// All other bits are reserved and must be set to 0. 396 enum EFI_ACPI_1_0_PCAT_COMPAT = BIT0; 397 enum EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC = 0x00; 398 enum EFI_ACPI_1_0_IO_APIC = 0x01; 399 enum EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE = 0x02; 400 enum EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE = 0x03; 401 enum EFI_ACPI_1_0_LOCAL_APIC_NMI = 0x04; 402 /// Processor Local APIC Structure Definition. 403 struct EFI_ACPI_1_0_PROCESSOR_LOCAL_APIC_STRUCTURE 404 { 405 align(1): 406 UINT8 Type; 407 UINT8 Length; 408 UINT8 AcpiProcessorId; 409 UINT8 ApicId; 410 UINT32 Flags; 411 } 412 /// Local APIC Flags. All other bits are reserved and must be 0. 413 enum EFI_ACPI_1_0_LOCAL_APIC_ENABLED = BIT0; 414 /// IO APIC Structure. 415 struct EFI_ACPI_1_0_IO_APIC_STRUCTURE 416 { 417 align(1): 418 UINT8 Type; 419 UINT8 Length; 420 UINT8 IoApicId; 421 UINT8 Reserved; 422 UINT32 IoApicAddress; 423 UINT32 SystemVectorBase; 424 } 425 /// Interrupt Source Override Structure. 426 struct EFI_ACPI_1_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE 427 { 428 align(1): 429 UINT8 Type; 430 UINT8 Length; 431 UINT8 Bus; 432 UINT8 Source; 433 UINT32 GlobalSystemInterruptVector; 434 UINT16 Flags; 435 } 436 /// Non-Maskable Interrupt Source Structure. 437 struct EFI_ACPI_1_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE 438 { 439 align(1): 440 UINT8 Type; 441 UINT8 Length; 442 UINT16 Flags; 443 UINT32 GlobalSystemInterruptVector; 444 } 445 /// Local APIC NMI Structure. 446 struct EFI_ACPI_1_0_LOCAL_APIC_NMI_STRUCTURE 447 { 448 align(1): 449 UINT8 Type; 450 UINT8 Length; 451 UINT8 AcpiProcessorId; 452 UINT16 Flags; 453 UINT8 LocalApicInti; 454 } 455 /// Smart Battery Description Table (SBST) 456 struct EFI_ACPI_1_0_SMART_BATTERY_DESCRIPTION_TABLE 457 { 458 align(1): 459 EFI_ACPI_DESCRIPTION_HEADER Header; 460 UINT32 WarningEnergyLevel; 461 UINT32 LowEnergyLevel; 462 UINT32 CriticalEnergyLevel; 463 } 464 /// "RSD PTR " Root System Description Pointer. 465 enum EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE = SIGNATURE_64('R', 466 'S', 'D', ' ', 'P', 'T', 'R', ' '); 467 /// "APIC" Multiple APIC Description Table. 468 enum EFI_ACPI_1_0_APIC_SIGNATURE = SIGNATURE_32('A', 'P', 'I', 'C'); 469 /// "DSDT" Differentiated System Description Table. 470 enum EFI_ACPI_1_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 471 'D', 'S', 'D', 'T'); 472 /// "FACS" Firmware ACPI Control Structure. 473 enum EFI_ACPI_1_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE = SIGNATURE_32('F', 'A', 474 'C', 'S'); 475 /// "FACP" Fixed ACPI Description Table. 476 enum EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('F', 'A', 'C', 477 'P'); 478 /// "PSDT" Persistent System Description Table. 479 enum EFI_ACPI_1_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('P', 480 'S', 'D', 'T'); 481 /// "RSDT" Root System Description Table. 482 enum EFI_ACPI_1_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('R', 'S', 483 'D', 'T'); 484 /// "SBST" Smart Battery Specification Table. 485 enum EFI_ACPI_1_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'B', 486 'S', 'T'); 487 /// "SSDT" Secondary System Description Table. 488 enum EFI_ACPI_1_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('S', 489 'S', 'D', 'T');