1 /** 2 Based on IndustryStandard/Acpi20.h, original notice: 3 4 ACPI 2.0 definitions from the ACPI Specification, revision 2.0 5 6 Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved. 7 This program and the accompanying materials 8 are licensed and made available under the terms and conditions of the BSD License 9 which accompanies this distribution. The full text of the license may be found at 10 http://opensource.org/licenses/bsd-license.php 11 12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 **/ 15 module uefi.acpi20; 16 import uefi.base; 17 import uefi.base_type; 18 import uefi.acpiaml; 19 import uefi.acpi10; 20 21 public: 22 extern (C): 23 24 enum ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME = 0x02; 25 enum ACPI_GENERIC_REGISTER_DESCRIPTOR = 0x82; 26 /// Generic Register Descriptor 27 struct EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR 28 { 29 align(1): 30 ACPI_LARGE_RESOURCE_HEADER Header; 31 UINT8 AddressSpaceId; 32 UINT8 RegisterBitWidth; 33 UINT8 RegisterBitOffset; 34 UINT8 AddressSize; 35 UINT64 RegisterAddress; 36 } 37 /// ACPI 2.0 Generic Address Space definition 38 struct EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE 39 { 40 align(1): 41 UINT8 AddressSpaceId; 42 UINT8 RegisterBitWidth; 43 UINT8 RegisterBitOffset; 44 UINT8 Reserved; 45 UINT64 Address; 46 } 47 48 enum EFI_ACPI_2_0_SYSTEM_MEMORY = 0; 49 enum EFI_ACPI_2_0_SYSTEM_IO = 1; 50 enum EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE = 2; 51 enum EFI_ACPI_2_0_EMBEDDED_CONTROLLER = 3; 52 enum EFI_ACPI_2_0_SMBUS = 4; 53 enum EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE = 0x7F; 54 /// Root System Description Pointer Structure 55 struct EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER 56 { 57 align(1): 58 UINT64 Signature; 59 UINT8 Checksum; 60 UINT8[6] OemId; 61 UINT8 Revision; 62 UINT32 RsdtAddress; 63 UINT32 Length; 64 UINT64 XsdtAddress; 65 UINT8 ExtendedChecksum; 66 UINT8[3] Reserved; 67 } 68 /// RSD_PTR Revision (as defined in ACPI 2.0 spec.) 69 enum EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION = 0x02; 70 /// Common table header, this prefaces all ACPI tables, including FACS, but 71 /// excluding the RSD PTR structure 72 struct EFI_ACPI_2_0_COMMON_HEADER 73 { 74 align(1): 75 UINT32 Signature; 76 UINT32 Length; 77 } 78 /// RSDT Revision (as defined in ACPI 2.0 spec.) 79 enum EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 80 /// XSDT Revision (as defined in ACPI 2.0 spec.) 81 enum EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 82 /// Fixed ACPI Description Table Structure (FADT) 83 struct EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE 84 { 85 align(1): 86 EFI_ACPI_DESCRIPTION_HEADER Header; 87 UINT32 FirmwareCtrl; 88 UINT32 Dsdt; 89 UINT8 Reserved0; 90 UINT8 PreferredPmProfile; 91 UINT16 SciInt; 92 UINT32 SmiCmd; 93 UINT8 AcpiEnable; 94 UINT8 AcpiDisable; 95 UINT8 S4BiosReq; 96 UINT8 PstateCnt; 97 UINT32 Pm1aEvtBlk; 98 UINT32 Pm1bEvtBlk; 99 UINT32 Pm1aCntBlk; 100 UINT32 Pm1bCntBlk; 101 UINT32 Pm2CntBlk; 102 UINT32 PmTmrBlk; 103 UINT32 Gpe0Blk; 104 UINT32 Gpe1Blk; 105 UINT8 Pm1EvtLen; 106 UINT8 Pm1CntLen; 107 UINT8 Pm2CntLen; 108 UINT8 PmTmrLen; 109 UINT8 Gpe0BlkLen; 110 UINT8 Gpe1BlkLen; 111 UINT8 Gpe1Base; 112 UINT8 CstCnt; 113 UINT16 PLvl2Lat; 114 UINT16 PLvl3Lat; 115 UINT16 FlushSize; 116 UINT16 FlushStride; 117 UINT8 DutyOffset; 118 UINT8 DutyWidth; 119 UINT8 DayAlrm; 120 UINT8 MonAlrm; 121 UINT8 Century; 122 UINT16 IaPcBootArch; 123 UINT8 Reserved1; 124 UINT32 Flags; 125 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 126 UINT8 ResetValue; 127 UINT8[3] Reserved2; 128 UINT64 XFirmwareCtrl; 129 UINT64 XDsdt; 130 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 131 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 132 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 133 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 134 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 135 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 136 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 137 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 138 } 139 /// FADT Version (as defined in ACPI 2.0 spec.) 140 enum EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION = 0x03; 141 enum EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED = 0; 142 enum EFI_ACPI_2_0_PM_PROFILE_DESKTOP = 1; 143 enum EFI_ACPI_2_0_PM_PROFILE_MOBILE = 2; 144 enum EFI_ACPI_2_0_PM_PROFILE_WORKSTATION = 3; 145 enum EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER = 4; 146 enum EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER = 5; 147 enum EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC = 6; 148 enum EFI_ACPI_2_0_LEGACY_DEVICES = BIT0; 149 enum EFI_ACPI_2_0_8042 = BIT1; 150 enum EFI_ACPI_2_0_WBINVD = BIT0; 151 enum EFI_ACPI_2_0_WBINVD_FLUSH = BIT1; 152 enum EFI_ACPI_2_0_PROC_C1 = BIT2; 153 enum EFI_ACPI_2_0_P_LVL2_UP = BIT3; 154 enum EFI_ACPI_2_0_PWR_BUTTON = BIT4; 155 enum EFI_ACPI_2_0_SLP_BUTTON = BIT5; 156 enum EFI_ACPI_2_0_FIX_RTC = BIT6; 157 enum EFI_ACPI_2_0_RTC_S4 = BIT7; 158 enum EFI_ACPI_2_0_TMR_VAL_EXT = BIT8; 159 enum EFI_ACPI_2_0_DCK_CAP = BIT9; 160 enum EFI_ACPI_2_0_RESET_REG_SUP = BIT10; 161 enum EFI_ACPI_2_0_SEALED_CASE = BIT11; 162 enum EFI_ACPI_2_0_HEADLESS = BIT12; 163 enum EFI_ACPI_2_0_CPU_SW_SLP = BIT13; 164 /// Firmware ACPI Control Structure 165 struct EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE 166 { 167 align(1): 168 UINT32 Signature; 169 UINT32 Length; 170 UINT32 HardwareSignature; 171 UINT32 FirmwareWakingVector; 172 UINT32 GlobalLock; 173 UINT32 Flags; 174 UINT64 XFirmwareWakingVector; 175 UINT8 Version; 176 UINT8[31] Reserved; 177 } 178 /// FACS Version (as defined in ACPI 2.0 spec.) 179 enum EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION = 0x01; 180 /// Firmware Control Structure Feature Flags 181 /// All other bits are reserved and must be set to 0. 182 enum EFI_ACPI_2_0_S4BIOS_F = BIT0; 183 /// Multiple APIC Description Table header definition. The rest of the table 184 /// must be defined in a platform specific manner. 185 struct EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER 186 { 187 align(1): 188 EFI_ACPI_DESCRIPTION_HEADER Header; 189 UINT32 LocalApicAddress; 190 UINT32 Flags; 191 } 192 /// MADT Revision (as defined in ACPI 2.0 spec.) 193 enum EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION = 0x01; 194 /// Multiple APIC Flags 195 /// All other bits are reserved and must be set to 0. 196 enum EFI_ACPI_2_0_PCAT_COMPAT = BIT0; 197 enum EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC = 0x00; 198 enum EFI_ACPI_2_0_IO_APIC = 0x01; 199 enum EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE = 0x02; 200 enum EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE = 0x03; 201 enum EFI_ACPI_2_0_LOCAL_APIC_NMI = 0x04; 202 enum EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE = 0x05; 203 enum EFI_ACPI_2_0_IO_SAPIC = 0x06; 204 enum EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC = 0x07; 205 enum EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES = 0x08; 206 /// Processor Local APIC Structure Definition 207 struct EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE 208 { 209 align(1): 210 UINT8 Type; 211 UINT8 Length; 212 UINT8 AcpiProcessorId; 213 UINT8 ApicId; 214 UINT32 Flags; 215 } 216 /// Local APIC Flags. All other bits are reserved and must be 0. 217 enum EFI_ACPI_2_0_LOCAL_APIC_ENABLED = BIT0; 218 /// IO APIC Structure 219 struct EFI_ACPI_2_0_IO_APIC_STRUCTURE 220 { 221 align(1): 222 UINT8 Type; 223 UINT8 Length; 224 UINT8 IoApicId; 225 UINT8 Reserved; 226 UINT32 IoApicAddress; 227 UINT32 GlobalSystemInterruptBase; 228 } 229 /// Interrupt Source Override Structure 230 struct EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE 231 { 232 align(1): 233 UINT8 Type; 234 UINT8 Length; 235 UINT8 Bus; 236 UINT8 Source; 237 UINT32 GlobalSystemInterrupt; 238 UINT16 Flags; 239 } 240 /// Non-Maskable Interrupt Source Structure 241 struct EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE 242 { 243 align(1): 244 UINT8 Type; 245 UINT8 Length; 246 UINT16 Flags; 247 UINT32 GlobalSystemInterrupt; 248 } 249 /// Local APIC NMI Structure 250 struct EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE 251 { 252 align(1): 253 UINT8 Type; 254 UINT8 Length; 255 UINT8 AcpiProcessorId; 256 UINT16 Flags; 257 UINT8 LocalApicLint; 258 } 259 /// Local APIC Address Override Structure 260 struct EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE 261 { 262 align(1): 263 UINT8 Type; 264 UINT8 Length; 265 UINT16 Reserved; 266 UINT64 LocalApicAddress; 267 } 268 /// IO SAPIC Structure 269 struct EFI_ACPI_2_0_IO_SAPIC_STRUCTURE 270 { 271 align(1): 272 UINT8 Type; 273 UINT8 Length; 274 UINT8 IoApicId; 275 UINT8 Reserved; 276 UINT32 GlobalSystemInterruptBase; 277 UINT64 IoSapicAddress; 278 } 279 /// Local SAPIC Structure 280 struct EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE 281 { 282 align(1): 283 UINT8 Type; 284 UINT8 Length; 285 UINT8 AcpiProcessorId; 286 UINT8 LocalSapicId; 287 UINT8 LocalSapicEid; 288 UINT8[3] Reserved; 289 UINT32 Flags; 290 } 291 /// Platform Interrupt Sources Structure 292 struct EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE 293 { 294 align(1): 295 UINT8 Type; 296 UINT8 Length; 297 UINT16 Flags; 298 UINT8 InterruptType; 299 UINT8 ProcessorId; 300 UINT8 ProcessorEid; 301 UINT8 IoSapicVector; 302 UINT32 GlobalSystemInterrupt; 303 UINT32 Reserved; 304 } 305 /// Smart Battery Description Table (SBST) 306 struct EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE 307 { 308 align(1): 309 EFI_ACPI_DESCRIPTION_HEADER Header; 310 UINT32 WarningEnergyLevel; 311 UINT32 LowEnergyLevel; 312 UINT32 CriticalEnergyLevel; 313 } 314 /// SBST Version (as defined in ACPI 2.0 spec.) 315 enum EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION = 0x01; 316 /// Embedded Controller Boot Resources Table (ECDT) 317 /// The table is followed by a null terminated ASCII string that contains 318 /// a fully qualified reference to the name space object. 319 struct EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE 320 { 321 align(1): 322 EFI_ACPI_DESCRIPTION_HEADER Header; 323 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl; 324 EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData; 325 UINT32 Uid; 326 UINT8 GpeBit; 327 } 328 /// ECDT Version (as defined in ACPI 2.0 spec.) 329 enum EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION = 0x01; 330 /// "RSD PTR " Root System Description Pointer 331 enum EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE = SIGNATURE_64('R', 332 'S', 'D', ' ', 'P', 'T', 'R', ' '); 333 /// "SPIC" Multiple SAPIC Description Table 334 /// BUGBUG: Don't know where this came from except SR870BN4 uses it. 335 /// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053 336 enum EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('A', 'P', 337 'I', 'C'); 338 /// "BOOT" MS Simple Boot Spec 339 enum EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE = SIGNATURE_32('B', 'O', 'O', 'T'); 340 /// "DBGP" MS Bebug Port Spec 341 enum EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE = SIGNATURE_32('D', 'B', 'G', 'P'); 342 /// "DSDT" Differentiated System Description Table 343 enum EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 344 'D', 'S', 'D', 'T'); 345 /// "ECDT" Embedded Controller Boot Resources Table 346 enum EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE = SIGNATURE_32( 347 'E', 'C', 'D', 'T'); 348 /// "ETDT" Event Timer Description Table 349 enum EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('E', 'T', 350 'D', 'T'); 351 /// "FACS" Firmware ACPI Control Structure 352 enum EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE = SIGNATURE_32('F', 'A', 353 'C', 'S'); 354 /// "FACP" Fixed ACPI Description Table 355 enum EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('F', 'A', 'C', 356 'P'); 357 /// "APIC" Multiple APIC Description Table 358 enum EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('A', 'P', 359 'I', 'C'); 360 /// "PSDT" Persistent System Description Table 361 enum EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('P', 362 'S', 'D', 'T'); 363 /// "RSDT" Root System Description Table 364 enum EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('R', 'S', 365 'D', 'T'); 366 /// "SBST" Smart Battery Specification Table 367 enum EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'B', 368 'S', 'T'); 369 /// "SLIT" System Locality Information Table 370 enum EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'L', 371 'I', 'T'); 372 /// "SPCR" Serial Port Concole Redirection Table 373 enum EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE = SIGNATURE_32('S', 374 'P', 'C', 'R'); 375 /// "SRAT" Static Resource Affinity Table 376 enum EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE = SIGNATURE_32('S', 'R', 377 'A', 'T'); 378 /// "SSDT" Secondary System Description Table 379 enum EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('S', 380 'S', 'D', 'T'); 381 /// "SPMI" Server Platform Management Interface Table 382 enum EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE = SIGNATURE_32('S', 383 'P', 'M', 'I'); 384 /// "XSDT" Extended System Description Table 385 enum EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('X', 'S', 386 'D', 'T'); 387 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 388 enum EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE = SIGNATURE_32( 389 'M', 'C', 'F', 'G');