1 /** 2 Based on IndustryStandard/Acpi50.h, original notice: 3 4 ACPI 5.0 definitions from the ACPI Specification Revision 5.0a November 13, 2013. 5 6 Copyright (c) 2014 Hewlett-Packard Development Company, L.P. 7 Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved. 8 This program and the accompanying materials 9 are licensed and made available under the terms and conditions of the BSD License 10 which accompanies this distribution. The full text of the license may be found at 11 http://opensource.org/licenses/bsd-license.php 12 13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 **/ 16 module uefi.acpi50; 17 import uefi.base; 18 import uefi.base_type; 19 import uefi.acpiaml; 20 import uefi.acpi10; 21 import uefi.acpi20; 22 import uefi.acpi30; 23 import uefi.acpi40; 24 25 public: 26 extern (C): 27 // FIXME: INCLUDE <IndustryStandard/Acpi40.h> 28 enum ACPI_SMALL_FIXED_DMA_DESCRIPTOR_NAME = 0x0A; 29 enum ACPI_LARGE_GPIO_CONNECTION_DESCRIPTOR_NAME = 0x0C; 30 enum ACPI_LARGE_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR_NAME = 0x0E; 31 enum ACPI_FIXED_DMA_DESCRIPTOR = 0x55; 32 enum ACPI_GPIO_CONNECTION_DESCRIPTOR = 0x8C; 33 enum ACPI_GENERIC_SERIAL_BUS_CONNECTION_DESCRIPTOR = 0x8E; 34 /// Generic DMA Descriptor. 35 struct EFI_ACPI_FIXED_DMA_DESCRIPTOR 36 { 37 align(1): 38 ACPI_SMALL_RESOURCE_HEADER Header; 39 UINT16 DmaRequestLine; 40 UINT16 DmaChannel; 41 UINT8 DmaTransferWidth; 42 } 43 /// GPIO Connection Descriptor 44 struct EFI_ACPI_GPIO_CONNECTION_DESCRIPTOR 45 { 46 align(1): 47 ACPI_LARGE_RESOURCE_HEADER Header; 48 UINT8 RevisionId; 49 UINT8 ConnectionType; 50 UINT16 GeneralFlags; 51 UINT16 InterruptFlags; 52 UINT8 PinConfiguration; 53 UINT16 OutputDriveStrength; 54 UINT16 DebounceTimeout; 55 UINT16 PinTableOffset; 56 UINT8 ResourceSourceIndex; 57 UINT16 ResourceSourceNameOffset; 58 UINT16 VendorDataOffset; 59 UINT16 VendorDataLength; 60 } 61 62 enum EFI_ACPI_GPIO_CONNECTION_TYPE_INTERRUPT = 0x0; 63 enum EFI_ACPI_GPIO_CONNECTION_TYPE_IO = 0x1; 64 /// Serial Bus Resource Descriptor (Generic) 65 struct EFI_ACPI_SERIAL_BUS_RESOURCE_DESCRIPTOR 66 { 67 align(1): 68 ACPI_LARGE_RESOURCE_HEADER Header; 69 UINT8 RevisionId; 70 UINT8 ResourceSourceIndex; 71 UINT8 SerialBusType; 72 UINT8 GeneralFlags; 73 UINT16 TypeSpecificFlags; 74 UINT8 TypeSpecificRevisionId; 75 UINT16 TypeDataLength; 76 // Type specific data 77 } 78 79 enum EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_I2C = 0x1; 80 enum EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_SPI = 0x2; 81 enum EFI_ACPI_SERIAL_BUS_RESOURCE_TYPE_UART = 0x3; 82 /// Serial Bus Resource Descriptor (I2C) 83 struct EFI_ACPI_SERIAL_BUS_RESOURCE_I2C_DESCRIPTOR 84 { 85 align(1): 86 ACPI_LARGE_RESOURCE_HEADER Header; 87 UINT8 RevisionId; 88 UINT8 ResourceSourceIndex; 89 UINT8 SerialBusType; 90 UINT8 GeneralFlags; 91 UINT16 TypeSpecificFlags; 92 UINT8 TypeSpecificRevisionId; 93 UINT16 TypeDataLength; 94 UINT32 ConnectionSpeed; 95 UINT16 SlaveAddress; 96 } 97 /// Serial Bus Resource Descriptor (SPI) 98 struct EFI_ACPI_SERIAL_BUS_RESOURCE_SPI_DESCRIPTOR 99 { 100 align(1): 101 ACPI_LARGE_RESOURCE_HEADER Header; 102 UINT8 RevisionId; 103 UINT8 ResourceSourceIndex; 104 UINT8 SerialBusType; 105 UINT8 GeneralFlags; 106 UINT16 TypeSpecificFlags; 107 UINT8 TypeSpecificRevisionId; 108 UINT16 TypeDataLength; 109 UINT32 ConnectionSpeed; 110 UINT8 DataBitLength; 111 UINT8 Phase; 112 UINT8 Polarity; 113 UINT16 DeviceSelection; 114 } 115 /// Serial Bus Resource Descriptor (UART) 116 struct EFI_ACPI_SERIAL_BUS_RESOURCE_UART_DESCRIPTOR 117 { 118 align(1): 119 ACPI_LARGE_RESOURCE_HEADER Header; 120 UINT8 RevisionId; 121 UINT8 ResourceSourceIndex; 122 UINT8 SerialBusType; 123 UINT8 GeneralFlags; 124 UINT16 TypeSpecificFlags; 125 UINT8 TypeSpecificRevisionId; 126 UINT16 TypeDataLength; 127 UINT32 DefaultBaudRate; 128 UINT16 RxFIFO; 129 UINT16 TxFIFO; 130 UINT8 Parity; 131 UINT8 SerialLinesEnabled; 132 } 133 /// ACPI 5.0 Generic Address Space definition 134 struct EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE 135 { 136 align(1): 137 UINT8 AddressSpaceId; 138 UINT8 RegisterBitWidth; 139 UINT8 RegisterBitOffset; 140 UINT8 AccessSize; 141 UINT64 Address; 142 } 143 144 enum EFI_ACPI_5_0_SYSTEM_MEMORY = 0; 145 enum EFI_ACPI_5_0_SYSTEM_IO = 1; 146 enum EFI_ACPI_5_0_PCI_CONFIGURATION_SPACE = 2; 147 enum EFI_ACPI_5_0_EMBEDDED_CONTROLLER = 3; 148 enum EFI_ACPI_5_0_SMBUS = 4; 149 enum EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL = 0x0A; 150 enum EFI_ACPI_5_0_FUNCTIONAL_FIXED_HARDWARE = 0x7F; 151 enum EFI_ACPI_5_0_UNDEFINED = 0; 152 enum EFI_ACPI_5_0_BYTE = 1; 153 enum EFI_ACPI_5_0_WORD = 2; 154 enum EFI_ACPI_5_0_DWORD = 3; 155 enum EFI_ACPI_5_0_QWORD = 4; 156 /// Root System Description Pointer Structure 157 struct EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER 158 { 159 align(1): 160 UINT64 Signature; 161 UINT8 Checksum; 162 UINT8[6] OemId; 163 UINT8 Revision; 164 UINT32 RsdtAddress; 165 UINT32 Length; 166 UINT64 XsdtAddress; 167 UINT8 ExtendedChecksum; 168 UINT8[3] Reserved; 169 } 170 /// RSD_PTR Revision (as defined in ACPI 5.0 spec.) 171 enum EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION = 0x02; ///< ACPISpec (Revision 5.0) says current value is 2 172 /// Common table header, this prefaces all ACPI tables, including FACS, but 173 /// excluding the RSD PTR structure 174 struct EFI_ACPI_5_0_COMMON_HEADER 175 { 176 align(1): 177 UINT32 Signature; 178 UINT32 Length; 179 } 180 /// RSDT Revision (as defined in ACPI 5.0 spec.) 181 enum EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 182 /// XSDT Revision (as defined in ACPI 5.0 spec.) 183 enum EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 184 /// Fixed ACPI Description Table Structure (FADT) 185 struct EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE 186 { 187 align(1): 188 EFI_ACPI_DESCRIPTION_HEADER Header; 189 UINT32 FirmwareCtrl; 190 UINT32 Dsdt; 191 UINT8 Reserved0; 192 UINT8 PreferredPmProfile; 193 UINT16 SciInt; 194 UINT32 SmiCmd; 195 UINT8 AcpiEnable; 196 UINT8 AcpiDisable; 197 UINT8 S4BiosReq; 198 UINT8 PstateCnt; 199 UINT32 Pm1aEvtBlk; 200 UINT32 Pm1bEvtBlk; 201 UINT32 Pm1aCntBlk; 202 UINT32 Pm1bCntBlk; 203 UINT32 Pm2CntBlk; 204 UINT32 PmTmrBlk; 205 UINT32 Gpe0Blk; 206 UINT32 Gpe1Blk; 207 UINT8 Pm1EvtLen; 208 UINT8 Pm1CntLen; 209 UINT8 Pm2CntLen; 210 UINT8 PmTmrLen; 211 UINT8 Gpe0BlkLen; 212 UINT8 Gpe1BlkLen; 213 UINT8 Gpe1Base; 214 UINT8 CstCnt; 215 UINT16 PLvl2Lat; 216 UINT16 PLvl3Lat; 217 UINT16 FlushSize; 218 UINT16 FlushStride; 219 UINT8 DutyOffset; 220 UINT8 DutyWidth; 221 UINT8 DayAlrm; 222 UINT8 MonAlrm; 223 UINT8 Century; 224 UINT16 IaPcBootArch; 225 UINT8 Reserved1; 226 UINT32 Flags; 227 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ResetReg; 228 UINT8 ResetValue; 229 UINT8[3] Reserved2; 230 UINT64 XFirmwareCtrl; 231 UINT64 XDsdt; 232 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 233 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 234 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 235 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 236 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 237 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 238 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 239 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 240 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 241 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 242 } 243 /// FADT Version (as defined in ACPI 5.0 spec.) 244 enum EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION = 0x05; 245 enum EFI_ACPI_5_0_PM_PROFILE_UNSPECIFIED = 0; 246 enum EFI_ACPI_5_0_PM_PROFILE_DESKTOP = 1; 247 enum EFI_ACPI_5_0_PM_PROFILE_MOBILE = 2; 248 enum EFI_ACPI_5_0_PM_PROFILE_WORKSTATION = 3; 249 enum EFI_ACPI_5_0_PM_PROFILE_ENTERPRISE_SERVER = 4; 250 enum EFI_ACPI_5_0_PM_PROFILE_SOHO_SERVER = 5; 251 enum EFI_ACPI_5_0_PM_PROFILE_APPLIANCE_PC = 6; 252 enum EFI_ACPI_5_0_PM_PROFILE_PERFORMANCE_SERVER = 7; 253 enum EFI_ACPI_5_0_PM_PROFILE_TABLET = 8; 254 enum EFI_ACPI_5_0_LEGACY_DEVICES = BIT0; 255 enum EFI_ACPI_5_0_8042 = BIT1; 256 enum EFI_ACPI_5_0_VGA_NOT_PRESENT = BIT2; 257 enum EFI_ACPI_5_0_MSI_NOT_SUPPORTED = BIT3; 258 enum EFI_ACPI_5_0_PCIE_ASPM_CONTROLS = BIT4; 259 enum EFI_ACPI_5_0_CMOS_RTC_NOT_PRESENT = BIT5; 260 enum EFI_ACPI_5_0_WBINVD = BIT0; 261 enum EFI_ACPI_5_0_WBINVD_FLUSH = BIT1; 262 enum EFI_ACPI_5_0_PROC_C1 = BIT2; 263 enum EFI_ACPI_5_0_P_LVL2_UP = BIT3; 264 enum EFI_ACPI_5_0_PWR_BUTTON = BIT4; 265 enum EFI_ACPI_5_0_SLP_BUTTON = BIT5; 266 enum EFI_ACPI_5_0_FIX_RTC = BIT6; 267 enum EFI_ACPI_5_0_RTC_S4 = BIT7; 268 enum EFI_ACPI_5_0_TMR_VAL_EXT = BIT8; 269 enum EFI_ACPI_5_0_DCK_CAP = BIT9; 270 enum EFI_ACPI_5_0_RESET_REG_SUP = BIT10; 271 enum EFI_ACPI_5_0_SEALED_CASE = BIT11; 272 enum EFI_ACPI_5_0_HEADLESS = BIT12; 273 enum EFI_ACPI_5_0_CPU_SW_SLP = BIT13; 274 enum EFI_ACPI_5_0_PCI_EXP_WAK = BIT14; 275 enum EFI_ACPI_5_0_USE_PLATFORM_CLOCK = BIT15; 276 enum EFI_ACPI_5_0_S4_RTC_STS_VALID = BIT16; 277 enum EFI_ACPI_5_0_REMOTE_POWER_ON_CAPABLE = BIT17; 278 enum EFI_ACPI_5_0_FORCE_APIC_CLUSTER_MODEL = BIT18; 279 enum EFI_ACPI_5_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE = BIT19; 280 enum EFI_ACPI_5_0_HW_REDUCED_ACPI = BIT20; 281 enum EFI_ACPI_5_0_LOW_POWER_S0_IDLE_CAPABLE = BIT21; 282 /// Firmware ACPI Control Structure 283 struct EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE 284 { 285 align(1): 286 UINT32 Signature; 287 UINT32 Length; 288 UINT32 HardwareSignature; 289 UINT32 FirmwareWakingVector; 290 UINT32 GlobalLock; 291 UINT32 Flags; 292 UINT64 XFirmwareWakingVector; 293 UINT8 Version; 294 UINT8[3] Reserved0; 295 UINT32 OspmFlags; 296 UINT8[24] Reserved1; 297 } 298 /// FACS Version (as defined in ACPI 5.0 spec.) 299 enum EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION = 0x02; 300 /// Firmware Control Structure Feature Flags 301 /// All other bits are reserved and must be set to 0. 302 enum EFI_ACPI_5_0_S4BIOS_F = BIT0; 303 enum EFI_ACPI_5_0_64BIT_WAKE_SUPPORTED_F = BIT1; 304 /// OSPM Enabled Firmware Control Structure Flags 305 /// All other bits are reserved and must be set to 0. 306 enum EFI_ACPI_5_0_OSPM_64BIT_WAKE_F = BIT0; 307 enum EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x02; 308 enum EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x02; 309 /// Multiple APIC Description Table header definition. The rest of the table 310 /// must be defined in a platform specific manner. 311 struct EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER 312 { 313 align(1): 314 EFI_ACPI_DESCRIPTION_HEADER Header; 315 UINT32 LocalApicAddress; 316 UINT32 Flags; 317 } 318 /// MADT Revision (as defined in ACPI 5.0 spec.) 319 enum EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION = 0x03; 320 /// Multiple APIC Flags 321 /// All other bits are reserved and must be set to 0. 322 enum EFI_ACPI_5_0_PCAT_COMPAT = BIT0; 323 enum EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC = 0x00; 324 enum EFI_ACPI_5_0_IO_APIC = 0x01; 325 enum EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE = 0x02; 326 enum EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE = 0x03; 327 enum EFI_ACPI_5_0_LOCAL_APIC_NMI = 0x04; 328 enum EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE = 0x05; 329 enum EFI_ACPI_5_0_IO_SAPIC = 0x06; 330 enum EFI_ACPI_5_0_LOCAL_SAPIC = 0x07; 331 enum EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES = 0x08; 332 enum EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC = 0x09; 333 enum EFI_ACPI_5_0_LOCAL_X2APIC_NMI = 0x0A; 334 enum EFI_ACPI_5_0_GIC = 0x0B; 335 enum EFI_ACPI_5_0_GICD = 0x0C; 336 /// Processor Local APIC Structure Definition 337 struct EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_STRUCTURE 338 { 339 align(1): 340 UINT8 Type; 341 UINT8 Length; 342 UINT8 AcpiProcessorId; 343 UINT8 ApicId; 344 UINT32 Flags; 345 } 346 /// Local APIC Flags. All other bits are reserved and must be 0. 347 enum EFI_ACPI_5_0_LOCAL_APIC_ENABLED = BIT0; 348 /// IO APIC Structure 349 struct EFI_ACPI_5_0_IO_APIC_STRUCTURE 350 { 351 align(1): 352 UINT8 Type; 353 UINT8 Length; 354 UINT8 IoApicId; 355 UINT8 Reserved; 356 UINT32 IoApicAddress; 357 UINT32 GlobalSystemInterruptBase; 358 } 359 /// Interrupt Source Override Structure 360 struct EFI_ACPI_5_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE 361 { 362 align(1): 363 UINT8 Type; 364 UINT8 Length; 365 UINT8 Bus; 366 UINT8 Source; 367 UINT32 GlobalSystemInterrupt; 368 UINT16 Flags; 369 } 370 /// Platform Interrupt Sources Structure Definition 371 struct EFI_ACPI_5_0_PLATFORM_INTERRUPT_APIC_STRUCTURE 372 { 373 align(1): 374 UINT8 Type; 375 UINT8 Length; 376 UINT16 Flags; 377 UINT8 InterruptType; 378 UINT8 ProcessorId; 379 UINT8 ProcessorEid; 380 UINT8 IoSapicVector; 381 UINT32 GlobalSystemInterrupt; 382 UINT32 PlatformInterruptSourceFlags; 383 UINT8 CpeiProcessorOverride; 384 UINT8[31] Reserved; 385 } 386 387 enum EFI_ACPI_5_0_POLARITY = (3 << 0); 388 enum EFI_ACPI_5_0_TRIGGER_MODE = (3 << 2); 389 /// Non-Maskable Interrupt Source Structure 390 struct EFI_ACPI_5_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE 391 { 392 align(1): 393 UINT8 Type; 394 UINT8 Length; 395 UINT16 Flags; 396 UINT32 GlobalSystemInterrupt; 397 } 398 /// Local APIC NMI Structure 399 struct EFI_ACPI_5_0_LOCAL_APIC_NMI_STRUCTURE 400 { 401 align(1): 402 UINT8 Type; 403 UINT8 Length; 404 UINT8 AcpiProcessorId; 405 UINT16 Flags; 406 UINT8 LocalApicLint; 407 } 408 /// Local APIC Address Override Structure 409 struct EFI_ACPI_5_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE 410 { 411 align(1): 412 UINT8 Type; 413 UINT8 Length; 414 UINT16 Reserved; 415 UINT64 LocalApicAddress; 416 } 417 /// IO SAPIC Structure 418 struct EFI_ACPI_5_0_IO_SAPIC_STRUCTURE 419 { 420 align(1): 421 UINT8 Type; 422 UINT8 Length; 423 UINT8 IoApicId; 424 UINT8 Reserved; 425 UINT32 GlobalSystemInterruptBase; 426 UINT64 IoSapicAddress; 427 } 428 /// Local SAPIC Structure 429 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 430 struct EFI_ACPI_5_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE 431 { 432 align(1): 433 UINT8 Type; 434 UINT8 Length; 435 UINT8 AcpiProcessorId; 436 UINT8 LocalSapicId; 437 UINT8 LocalSapicEid; 438 UINT8[3] Reserved; 439 UINT32 Flags; 440 UINT32 ACPIProcessorUIDValue; 441 } 442 /// Platform Interrupt Sources Structure 443 struct EFI_ACPI_5_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE 444 { 445 align(1): 446 UINT8 Type; 447 UINT8 Length; 448 UINT16 Flags; 449 UINT8 InterruptType; 450 UINT8 ProcessorId; 451 UINT8 ProcessorEid; 452 UINT8 IoSapicVector; 453 UINT32 GlobalSystemInterrupt; 454 UINT32 PlatformInterruptSourceFlags; 455 } 456 /// Platform Interrupt Source Flags. 457 /// All other bits are reserved and must be set to 0. 458 enum EFI_ACPI_5_0_CPEI_PROCESSOR_OVERRIDE = BIT0; 459 /// Processor Local x2APIC Structure Definition 460 struct EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE 461 { 462 align(1): 463 UINT8 Type; 464 UINT8 Length; 465 UINT8[2] Reserved; 466 UINT32 X2ApicId; 467 UINT32 Flags; 468 UINT32 AcpiProcessorUid; 469 } 470 /// Local x2APIC NMI Structure 471 struct EFI_ACPI_5_0_LOCAL_X2APIC_NMI_STRUCTURE 472 { 473 align(1): 474 UINT8 Type; 475 UINT8 Length; 476 UINT16 Flags; 477 UINT32 AcpiProcessorUid; 478 UINT8 LocalX2ApicLint; 479 UINT8[3] Reserved; 480 } 481 /// GIC Structure 482 struct EFI_ACPI_5_0_GIC_STRUCTURE 483 { 484 align(1): 485 UINT8 Type; 486 UINT8 Length; 487 UINT16 Reserved; 488 UINT32 GicId; 489 UINT32 AcpiProcessorUid; 490 UINT32 Flags; 491 UINT32 ParkingProtocolVersion; 492 UINT32 PerformanceInterruptGsiv; 493 UINT64 ParkedAddress; 494 UINT64 PhysicalBaseAddress; 495 } 496 /// GIC Flags. All other bits are reserved and must be 0. 497 enum EFI_ACPI_5_0_GIC_ENABLED = BIT0; 498 enum EFI_ACPI_5_0_PERFORMANCE_INTERRUPT_MODEL = BIT1; 499 /// GIC Distributor Structure 500 struct EFI_ACPI_5_0_GIC_DISTRIBUTOR_STRUCTURE 501 { 502 align(1): 503 UINT8 Type; 504 UINT8 Length; 505 UINT16 Reserved1; 506 UINT32 GicId; 507 UINT64 PhysicalBaseAddress; 508 UINT32 SystemVectorBase; 509 UINT32 Reserved2; 510 } 511 /// Smart Battery Description Table (SBST) 512 struct EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE 513 { 514 align(1): 515 EFI_ACPI_DESCRIPTION_HEADER Header; 516 UINT32 WarningEnergyLevel; 517 UINT32 LowEnergyLevel; 518 UINT32 CriticalEnergyLevel; 519 } 520 /// SBST Version (as defined in ACPI 5.0 spec.) 521 enum EFI_ACPI_5_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION = 0x01; 522 /// Embedded Controller Boot Resources Table (ECDT) 523 /// The table is followed by a null terminated ASCII string that contains 524 /// a fully qualified reference to the name space object. 525 struct EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE 526 { 527 align(1): 528 EFI_ACPI_DESCRIPTION_HEADER Header; 529 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcControl; 530 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE EcData; 531 UINT32 Uid; 532 UINT8 GpeBit; 533 } 534 /// ECDT Version (as defined in ACPI 5.0 spec.) 535 enum EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION = 0x01; 536 /// System Resource Affinity Table (SRAT). The rest of the table 537 /// must be defined in a platform specific manner. 538 struct EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER 539 { 540 align(1): 541 EFI_ACPI_DESCRIPTION_HEADER Header; 542 UINT32 Reserved1; ///< Must be set to 1 543 UINT64 Reserved2; 544 } 545 /// SRAT Version (as defined in ACPI 5.0 spec.) 546 enum EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION = 0x03; 547 enum EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY = 0x00; 548 enum EFI_ACPI_5_0_MEMORY_AFFINITY = 0x01; 549 enum EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY = 0x02; 550 /// Processor Local APIC/SAPIC Affinity Structure Definition 551 struct EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE 552 { 553 align(1): 554 UINT8 Type; 555 UINT8 Length; 556 UINT8 ProximityDomain7To0; 557 UINT8 ApicId; 558 UINT32 Flags; 559 UINT8 LocalSapicEid; 560 UINT8[3] ProximityDomain31To8; 561 UINT32 ClockDomain; 562 } 563 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 564 enum EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED = (1 << 0); 565 /// Memory Affinity Structure Definition 566 struct EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE 567 { 568 align(1): 569 UINT8 Type; 570 UINT8 Length; 571 UINT32 ProximityDomain; 572 UINT16 Reserved1; 573 UINT32 AddressBaseLow; 574 UINT32 AddressBaseHigh; 575 UINT32 LengthLow; 576 UINT32 LengthHigh; 577 UINT32 Reserved2; 578 UINT32 Flags; 579 UINT64 Reserved3; 580 } 581 582 enum EFI_ACPI_5_0_MEMORY_ENABLED = (1 << 0); 583 enum EFI_ACPI_5_0_MEMORY_HOT_PLUGGABLE = (1 << 1); 584 enum EFI_ACPI_5_0_MEMORY_NONVOLATILE = (1 << 2); 585 /// Processor Local x2APIC Affinity Structure Definition 586 struct EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE 587 { 588 align(1): 589 UINT8 Type; 590 UINT8 Length; 591 UINT8[2] Reserved1; 592 UINT32 ProximityDomain; 593 UINT32 X2ApicId; 594 UINT32 Flags; 595 UINT32 ClockDomain; 596 UINT8[4] Reserved2; 597 } 598 /// System Locality Distance Information Table (SLIT). 599 /// The rest of the table is a matrix. 600 struct EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER 601 { 602 align(1): 603 EFI_ACPI_DESCRIPTION_HEADER Header; 604 UINT64 NumberOfSystemLocalities; 605 } 606 /// SLIT Version (as defined in ACPI 5.0 spec.) 607 enum EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION = 0x01; 608 /// Corrected Platform Error Polling Table (CPEP) 609 struct EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER 610 { 611 align(1): 612 EFI_ACPI_DESCRIPTION_HEADER Header; 613 UINT8[8] Reserved; 614 } 615 /// CPEP Version (as defined in ACPI 5.0 spec.) 616 enum EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION = 0x01; 617 enum EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC = 0x00; 618 /// Corrected Platform Error Polling Processor Structure Definition 619 struct EFI_ACPI_5_0_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE 620 { 621 align(1): 622 UINT8 Type; 623 UINT8 Length; 624 UINT8 ProcessorId; 625 UINT8 ProcessorEid; 626 UINT32 PollingInterval; 627 } 628 /// Maximum System Characteristics Table (MSCT) 629 struct EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER 630 { 631 align(1): 632 EFI_ACPI_DESCRIPTION_HEADER Header; 633 UINT32 OffsetProxDomInfo; 634 UINT32 MaximumNumberOfProximityDomains; 635 UINT32 MaximumNumberOfClockDomains; 636 UINT64 MaximumPhysicalAddress; 637 } 638 /// MSCT Version (as defined in ACPI 5.0 spec.) 639 enum EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION = 0x01; 640 /// Maximum Proximity Domain Information Structure Definition 641 struct EFI_ACPI_5_0_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE 642 { 643 align(1): 644 UINT8 Revision; 645 UINT8 Length; 646 UINT32 ProximityDomainRangeLow; 647 UINT32 ProximityDomainRangeHigh; 648 UINT32 MaximumProcessorCapacity; 649 UINT64 MaximumMemoryCapacity; 650 } 651 /// ACPI RAS Feature Table definition. 652 struct EFI_ACPI_5_0_RAS_FEATURE_TABLE 653 { 654 align(1): 655 EFI_ACPI_DESCRIPTION_HEADER Header; 656 UINT8[12] PlatformCommunicationChannelIdentifier; 657 } 658 /// RASF Version (as defined in ACPI 5.0 spec.) 659 enum EFI_ACPI_5_0_RAS_FEATURE_TABLE_REVISION = 0x01; 660 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 661 struct EFI_ACPI_5_0_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION 662 { 663 align(1): 664 UINT32 Signature; 665 UINT16 Command; 666 UINT16 Status; 667 UINT16 Version; 668 UINT8[16] RASCapabilities; 669 UINT8[16] SetRASCapabilities; 670 UINT16 NumberOfRASFParameterBlocks; 671 UINT32 SetRASCapabilitiesStatus; 672 } 673 /// ACPI RASF PCC command code 674 enum EFI_ACPI_5_0_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND = 0x01; 675 /// ACPI RASF Platform RAS Capabilities 676 enum EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED = 0x01; 677 enum EFI_ACPI_5_0_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE = 0x02; 678 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 679 struct EFI_ACPI_5_0_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE 680 { 681 align(1): 682 UINT16 Type; 683 UINT16 Version; 684 UINT16 Length; 685 UINT16 PatrolScrubCommand; 686 UINT64[2] RequestedAddressRange; 687 UINT64[2] ActualAddressRange; 688 UINT16 Flags; 689 UINT8 RequestedSpeed; 690 } 691 /// ACPI RASF Patrol Scrub command 692 enum EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS = 0x01; 693 enum EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER = 0x02; 694 enum EFI_ACPI_5_0_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER = 0x03; 695 /// Memory Power State Table definition. 696 struct EFI_ACPI_5_0_MEMORY_POWER_STATUS_TABLE 697 { 698 align(1): 699 EFI_ACPI_DESCRIPTION_HEADER Header; 700 UINT8 PlatformCommunicationChannelIdentifier; 701 UINT8[3] Reserved; 702 // Memory Power Node Structure 703 // Memory Power State Characteristics 704 } 705 /// MPST Version (as defined in ACPI 5.0 spec.) 706 enum EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_REVISION = 0x01; 707 /// MPST Platform Communication Channel Shared Memory Region definition. 708 struct EFI_ACPI_5_0_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION 709 { 710 align(1): 711 UINT32 Signature; 712 UINT16 Command; 713 UINT16 Status; 714 UINT32 MemoryPowerCommandRegister; 715 UINT32 MemoryPowerStatusRegister; 716 UINT32 PowerStateId; 717 UINT32 MemoryPowerNodeId; 718 UINT64 MemoryEnergyConsumed; 719 UINT64 ExpectedAveragePowerComsuned; 720 } 721 /// ACPI MPST PCC command code 722 enum EFI_ACPI_5_0_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND = 0x03; 723 /// ACPI MPST Memory Power command 724 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE = 0x01; 725 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE = 0x02; 726 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED = 0x03; 727 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED = 0x04; 728 /// MPST Memory Power Node Table 729 struct EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE 730 { 731 align(1): 732 UINT8 PowerStateValue; 733 UINT8 PowerStateInformationIndex; 734 } 735 736 struct EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE 737 { 738 align(1): 739 UINT8 Flag; 740 UINT8 Reserved; 741 UINT16 MemoryPowerNodeId; 742 UINT32 Length; 743 UINT64 AddressBase; 744 UINT64 AddressLength; 745 UINT32 NumberOfPowerStates; 746 UINT32 NumberOfPhysicalComponents; 747 //EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 748 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 749 } 750 751 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE = 0x01; 752 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED = 0x02; 753 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE = 0x04; 754 struct EFI_ACPI_5_0_MPST_MEMORY_POWER_NODE_TABLE 755 { 756 align(1): 757 UINT16 MemoryPowerNodeCount; 758 UINT8[2] Reserved; 759 } 760 /// MPST Memory Power State Characteristics Table 761 struct EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE 762 { 763 align(1): 764 UINT8 PowerStateStructureID; 765 UINT8 Flag; 766 UINT16 Reserved; 767 UINT32 AveragePowerConsumedInMPS0; 768 UINT32 RelativePowerSavingToMPS0; 769 UINT64 ExitLatencyToMPS0; 770 } 771 772 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED = 0x01; 773 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY = 0x02; 774 enum EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT = 0x04; 775 struct EFI_ACPI_5_0_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE 776 { 777 align(1): 778 UINT16 MemoryPowerStateCharacteristicsCount; 779 UINT8[2] Reserved; 780 } 781 /// Memory Topology Table definition. 782 struct EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE 783 { 784 align(1): 785 EFI_ACPI_DESCRIPTION_HEADER Header; 786 UINT32 Reserved; 787 } 788 /// PMTT Version (as defined in ACPI 5.0 spec.) 789 enum EFI_ACPI_5_0_MEMORY_TOPOLOGY_TABLE_REVISION = 0x01; 790 /// Common Memory Aggregator Device Structure. 791 struct EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 792 { 793 align(1): 794 UINT8 Type; 795 UINT8 Reserved; 796 UINT16 Length; 797 UINT16 Flags; 798 UINT16 Reserved1; 799 } 800 /// Memory Aggregator Device Type 801 enum EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET = 0x1; 802 enum EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER = 0x2; 803 enum EFI_ACPI_5_0_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM = 0x3; 804 /// Socket Memory Aggregator Device Structure. 805 struct EFI_ACPI_5_0_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 806 { 807 align(1): 808 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 809 UINT16 SocketIdentifier; 810 UINT16 Reserved; 811 //EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 812 } 813 /// MemoryController Memory Aggregator Device Structure. 814 struct EFI_ACPI_5_0_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 815 { 816 align(1): 817 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 818 UINT32 ReadLatency; 819 UINT32 WriteLatency; 820 UINT32 ReadBandwidth; 821 UINT32 WriteBandwidth; 822 UINT16 OptimalAccessUnit; 823 UINT16 OptimalAccessAlignment; 824 UINT16 Reserved; 825 UINT16 NumberOfProximityDomains; 826 //UINT32 ProximityDomain[NumberOfProximityDomains]; 827 //EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 828 } 829 /// DIMM Memory Aggregator Device Structure. 830 struct EFI_ACPI_5_0_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 831 { 832 align(1): 833 EFI_ACPI_5_0_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 834 UINT16 PhysicalComponentIdentifier; 835 UINT16 Reserved; 836 UINT32 SizeOfDimm; 837 UINT32 SmbiosHandle; 838 } 839 /// Boot Graphics Resource Table definition. 840 struct EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE 841 { 842 align(1): 843 EFI_ACPI_DESCRIPTION_HEADER Header; 844 /// 845 /// 2-bytes (16 bit) version ID. This value must be 1. 846 /// 847 UINT16 Version; 848 /// 849 /// 1-byte status field indicating current status about the table. 850 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 851 /// 852 UINT8 Status; 853 /// 1-byte enumerated type field indicating format of the image. 854 /// 0 = Bitmap 855 /// 1 - 255 Reserved (for future use) 856 /// 857 UINT8 ImageType; /// 858 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 859 /// of the image bitmap. 860 /// 861 UINT64 ImageAddress; /// 862 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 863 /// (X, Y) display offset of the top left corner of the boot image. 864 /// The top left corner of the display is at offset (0, 0). 865 /// 866 UINT32 ImageOffsetX; /// 867 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 868 /// (X, Y) display offset of the top left corner of the boot image. 869 /// The top left corner of the display is at offset (0, 0). 870 /// 871 UINT32 ImageOffsetY; 872 } 873 /// BGRT Revision 874 enum EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION = 1; /// BGRT Version 875 enum EFI_ACPI_5_0_BGRT_VERSION = 0x01; /// BGRT Status 876 enum EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED = 0x00; 877 enum EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED = 0x01; 878 enum EFI_ACPI_5_0_BGRT_STATUS_INVALID = EFI_ACPI_5_0_BGRT_STATUS_NOT_DISPLAYED; 879 enum EFI_ACPI_5_0_BGRT_STATUS_VALID = EFI_ACPI_5_0_BGRT_STATUS_DISPLAYED; 880 /// BGRT Image Type 881 enum EFI_ACPI_5_0_BGRT_IMAGE_TYPE_BMP = 0x00; /// FPDT Version (as defined in ACPI 5.0 spec.) 882 enum EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION = 0x01; /// FPDT Performance Record Types 883 enum EFI_ACPI_5_0_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER = 0x0000; 884 enum EFI_ACPI_5_0_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER = 0x0001; 885 /// FPDT Performance Record Revision 886 enum EFI_ACPI_5_0_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER = 0x01; 887 enum EFI_ACPI_5_0_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER = 0x01; 888 /// FPDT Runtime Performance Record Types 889 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME = 0x0000; 890 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND = 0x0001; 891 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT = 0x0002; 892 /// FPDT Runtime Performance Record Revision 893 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME = 0x01; 894 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND = 0x01; 895 enum EFI_ACPI_5_0_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT = 0x02; 896 /// FPDT Performance Record header 897 struct EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER 898 { 899 align(1): 900 UINT16 Type; 901 UINT8 Length; 902 UINT8 Revision; 903 } 904 /// FPDT Performance Table header 905 struct EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER 906 { 907 align(1): 908 UINT32 Signature; 909 UINT32 Length; 910 } 911 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 912 struct EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD 913 { 914 align(1): 915 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 916 UINT32 Reserved; /// 917 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 918 /// 919 UINT64 BootPerformanceTablePointer; 920 } 921 /// FPDT S3 Performance Table Pointer Record Structure 922 struct EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD 923 { 924 align(1): 925 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 926 UINT32 Reserved; 927 /// 928 /// 64-bit processor-relative physical address of the S3 Performance Table. 929 /// 930 UINT64 S3PerformanceTablePointer; 931 } 932 /// FPDT Firmware Basic Boot Performance Record Structure 933 struct EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_RECORD 934 { 935 align(1): 936 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; 937 UINT32 Reserved; 938 /// 939 /// Timer value logged at the beginning of firmware image execution. 940 /// This may not always be zero or near zero. 941 /// 942 UINT64 ResetEnd; /// 943 /// Timer value logged just prior to loading the OS boot loader into memory. 944 /// For non-UEFI compatible boots, this field must be zero. 945 /// 946 UINT64 OsLoaderLoadImageStart; /// 947 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 948 /// For non-UEFI compatible boots, the timer value logged will be just prior 949 /// to the INT 19h handler invocation. 950 /// 951 UINT64 OsLoaderStartImageStart; /// 952 /// Timer value logged at the point when the OS loader calls the 953 /// ExitBootServices function for UEFI compatible firmware. 954 /// For non-UEFI compatible boots, this field must be zero. 955 /// 956 UINT64 ExitBootServicesEntry; /// 957 /// Timer value logged at the point just prior towhen the OS loader gaining 958 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 959 /// For non-UEFI compatible boots, this field must be zero. 960 /// 961 UINT64 ExitBootServicesExit; 962 } 963 /// FPDT Firmware Basic Boot Performance Table signature 964 enum EFI_ACPI_5_0_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE = SIGNATURE_32('F', 'B', 'P', 965 'T'); 966 struct EFI_ACPI_5_0_FPDT_FIRMWARE_BASIC_BOOT_TABLE 967 { 968 align(1): 969 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header; // 970 // one or more Performance Records. 971 // 972 } 973 /// FPDT "S3PT" S3 Performance Table 974 enum EFI_ACPI_5_0_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE = SIGNATURE_32('S', '3', 'P', 975 'T'); 976 struct EFI_ACPI_5_0_FPDT_FIRMWARE_S3_BOOT_TABLE 977 { 978 align(1): 979 EFI_ACPI_5_0_FPDT_PERFORMANCE_TABLE_HEADER Header; // 980 // one or more Performance Records. 981 // 982 } 983 /// FPDT Basic S3 Resume Performance Record 984 struct EFI_ACPI_5_0_FPDT_S3_RESUME_RECORD 985 { 986 align(1): 987 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; /// 988 /// A count of the number of S3 resume cycles since the last full boot sequence. 989 /// 990 UINT32 ResumeCount; /// 991 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 992 /// OS waking vector. Only the most recent resume cycle's time is retained. 993 /// 994 UINT64 FullResume; /// 995 /// Average timer value of all resume cycles logged since the last full boot 996 /// sequence, including the most recent resume. Note that the entire log of 997 /// timer values does not need to be retained in order to calculate this average. 998 /// 999 UINT64 AverageResume; 1000 } 1001 /// FPDT Basic S3 Suspend Performance Record 1002 struct EFI_ACPI_5_0_FPDT_S3_SUSPEND_RECORD 1003 { 1004 align(1): 1005 EFI_ACPI_5_0_FPDT_PERFORMANCE_RECORD_HEADER Header; /// 1006 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 1007 /// Only the most recent suspend cycle's timer value is retained. 1008 /// 1009 UINT64 SuspendStart; /// 1010 /// Timer value recorded at the final firmware write to SLP_TYP (or other 1011 /// mechanism) used to trigger hardware entry to S3. 1012 /// Only the most recent suspend cycle's timer value is retained. 1013 /// 1014 UINT64 SuspendEnd; 1015 } 1016 /// Firmware Performance Record Table definition. 1017 struct EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_RECORD_TABLE 1018 { 1019 align(1): 1020 EFI_ACPI_DESCRIPTION_HEADER Header; 1021 } 1022 /// Generic Timer Description Table definition. 1023 struct EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE 1024 { 1025 align(1): 1026 EFI_ACPI_DESCRIPTION_HEADER Header; 1027 UINT64 PhysicalAddress; 1028 UINT32 GlobalFlags; 1029 UINT32 SecurePL1TimerGSIV; 1030 UINT32 SecurePL1TimerFlags; 1031 UINT32 NonSecurePL1TimerGSIV; 1032 UINT32 NonSecurePL1TimerFlags; 1033 UINT32 VirtualTimerGSIV; 1034 UINT32 VirtualTimerFlags; 1035 UINT32 NonSecurePL2TimerGSIV; 1036 UINT32 NonSecurePL2TimerFlags; 1037 } 1038 /// GTDT Version (as defined in ACPI 5.0 spec.) 1039 enum EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION = 0x01; 1040 /// Global Flags. All other bits are reserved and must be 0. 1041 enum EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_MEMORY_MAPPED_BLOCK_PRESENT = BIT0; 1042 enum EFI_ACPI_5_0_GTDT_GLOBAL_FLAG_INTERRUPT_MODE = BIT1; 1043 /// Timer Flags. All other bits are reserved and must be 0. 1044 enum EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE = BIT0; 1045 enum EFI_ACPI_5_0_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY = BIT1; 1046 /// Boot Error Record Table (BERT) 1047 struct EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_HEADER 1048 { 1049 align(1): 1050 EFI_ACPI_DESCRIPTION_HEADER Header; 1051 UINT32 BootErrorRegionLength; 1052 UINT64 BootErrorRegion; 1053 } 1054 /// BERT Version (as defined in ACPI 5.0 spec.) 1055 enum EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_REVISION = 0x01; 1056 /// Boot Error Region Block Status Definition 1057 struct EFI_ACPI_5_0_ERROR_BLOCK_STATUS 1058 { 1059 align(1): 1060 mixin(bitfields!(UINT32, "UncorrectableErrorValid", 1, UINT32, 1061 "CorrectableErrorValid", 1, UINT32, "MultipleUncorrectableErrors", 1, 1062 UINT32, "MultipleCorrectableErrors", 1, UINT32, "ErrorDataEntryCount", 1063 10, UINT32, "Reserved", 18)); 1064 } 1065 /// Boot Error Region Definition 1066 struct EFI_ACPI_5_0_BOOT_ERROR_REGION_STRUCTURE 1067 { 1068 align(1): 1069 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus; 1070 UINT32 RawDataOffset; 1071 UINT32 RawDataLength; 1072 UINT32 DataLength; 1073 UINT32 ErrorSeverity; 1074 } 1075 1076 enum EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTABLE = 0x00; 1077 enum EFI_ACPI_5_0_ERROR_SEVERITY_FATAL = 0x01; 1078 enum EFI_ACPI_5_0_ERROR_SEVERITY_CORRECTED = 0x02; 1079 enum EFI_ACPI_5_0_ERROR_SEVERITY_NONE = 0x03; 1080 /// Generic Error Data Entry Definition 1081 struct EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_STRUCTURE 1082 { 1083 align(1): 1084 UINT8[16] SectionType; 1085 UINT32 ErrorSeverity; 1086 UINT16 Revision; 1087 UINT8 ValidationBits; 1088 UINT8 Flags; 1089 UINT32 ErrorDataLength; 1090 UINT8[16] FruId; 1091 UINT8[20] FruText; 1092 } 1093 /// Generic Error Data Entry Version (as defined in ACPI 5.0 spec.) 1094 enum EFI_ACPI_5_0_GENERIC_ERROR_DATA_ENTRY_REVISION = 0x0201; 1095 /// HEST - Hardware Error Source Table 1096 struct EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_HEADER 1097 { 1098 align(1): 1099 EFI_ACPI_DESCRIPTION_HEADER Header; 1100 UINT32 ErrorSourceCount; 1101 } 1102 /// HEST Version (as defined in ACPI 5.0 spec.) 1103 enum EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_REVISION = 0x01; 1104 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION = 0x00; 1105 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK = 0x01; 1106 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR = 0x02; 1107 enum EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER = 0x06; 1108 enum EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER = 0x07; 1109 enum EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER = 0x08; 1110 enum EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR = 0x09; 1111 enum EFI_ACPI_5_0_ERROR_SOURCE_FLAG_FIRMWARE_FIRST = (1 << 0); 1112 enum EFI_ACPI_5_0_ERROR_SOURCE_FLAG_GLOBAL = (1 << 1); 1113 /// IA-32 Architecture Machine Check Exception Structure Definition 1114 struct EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE 1115 { 1116 align(1): 1117 UINT16 Type; 1118 UINT16 SourceId; 1119 UINT8[2] Reserved0; 1120 UINT8 Flags; 1121 UINT8 Enabled; 1122 UINT32 NumberOfRecordsToPreAllocate; 1123 UINT32 MaxSectionsPerRecord; 1124 UINT64 GlobalCapabilityInitData; 1125 UINT64 GlobalControlInitData; 1126 UINT8 NumberOfHardwareBanks; 1127 UINT8[7] Reserved1; 1128 } 1129 /// IA-32 Architecture Machine Check Bank Structure Definition 1130 struct EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE 1131 { 1132 align(1): 1133 UINT8 BankNumber; 1134 UINT8 ClearStatusOnInitialization; 1135 UINT8 StatusDataFormat; 1136 UINT8 Reserved0; 1137 UINT32 ControlRegisterMsrAddress; 1138 UINT64 ControlInitData; 1139 UINT32 StatusRegisterMsrAddress; 1140 UINT32 AddressRegisterMsrAddress; 1141 UINT32 MiscRegisterMsrAddress; 1142 } 1143 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1144 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 = 0x00; 1145 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 = 0x01; 1146 enum EFI_ACPI_5_0_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 = 0x02; 1147 enum EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_POLLED = 0x00; 1148 enum EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT = 0x01; 1149 enum EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT = 0x02; 1150 enum EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_SCI = 0x03; 1151 enum EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_NMI = 0x04; 1152 /// Hardware Error Notification Configuration Write Enable Structure Definition 1153 struct EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE 1154 { 1155 align(1): 1156 mixin(bitfields!(UINT16, "Type", 1, UINT16, "PollInterval", 1, UINT16, 1157 "SwitchToPollingThresholdValue", 1, UINT16, 1158 "SwitchToPollingThresholdWindow", 1, UINT16, "ErrorThresholdValue", 1, 1159 UINT16, "ErrorThresholdWindow", 1, UINT16, "Reserved", 10)); 1160 } 1161 /// Hardware Error Notification Structure Definition 1162 struct EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE 1163 { 1164 align(1): 1165 UINT8 Type; 1166 UINT8 Length; 1167 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1168 UINT32 PollInterval; 1169 UINT32 Vector; 1170 UINT32 SwitchToPollingThresholdValue; 1171 UINT32 SwitchToPollingThresholdWindow; 1172 UINT32 ErrorThresholdValue; 1173 UINT32 ErrorThresholdWindow; 1174 } 1175 /// IA-32 Architecture Corrected Machine Check Structure Definition 1176 struct EFI_ACPI_5_0_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE 1177 { 1178 align(1): 1179 UINT16 Type; 1180 UINT16 SourceId; 1181 UINT8[2] Reserved0; 1182 UINT8 Flags; 1183 UINT8 Enabled; 1184 UINT32 NumberOfRecordsToPreAllocate; 1185 UINT32 MaxSectionsPerRecord; 1186 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1187 UINT8 NumberOfHardwareBanks; 1188 UINT8[3] Reserved1; 1189 } 1190 /// IA-32 Architecture NMI Error Structure Definition 1191 struct EFI_ACPI_5_0_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE 1192 { 1193 align(1): 1194 UINT16 Type; 1195 UINT16 SourceId; 1196 UINT8[2] Reserved0; 1197 UINT32 NumberOfRecordsToPreAllocate; 1198 UINT32 MaxSectionsPerRecord; 1199 UINT32 MaxRawDataLength; 1200 } 1201 /// PCI Express Root Port AER Structure Definition 1202 struct EFI_ACPI_5_0_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE 1203 { 1204 align(1): 1205 UINT16 Type; 1206 UINT16 SourceId; 1207 UINT8[2] Reserved0; 1208 UINT8 Flags; 1209 UINT8 Enabled; 1210 UINT32 NumberOfRecordsToPreAllocate; 1211 UINT32 MaxSectionsPerRecord; 1212 UINT32 Bus; 1213 UINT16 Device; 1214 UINT16 Function; 1215 UINT16 DeviceControl; 1216 UINT8[2] Reserved1; 1217 UINT32 UncorrectableErrorMask; 1218 UINT32 UncorrectableErrorSeverity; 1219 UINT32 CorrectableErrorMask; 1220 UINT32 AdvancedErrorCapabilitiesAndControl; 1221 UINT32 RootErrorCommand; 1222 } 1223 /// PCI Express Device AER Structure Definition 1224 struct EFI_ACPI_5_0_PCI_EXPRESS_DEVICE_AER_STRUCTURE 1225 { 1226 align(1): 1227 UINT16 Type; 1228 UINT16 SourceId; 1229 UINT8[2] Reserved0; 1230 UINT8 Flags; 1231 UINT8 Enabled; 1232 UINT32 NumberOfRecordsToPreAllocate; 1233 UINT32 MaxSectionsPerRecord; 1234 UINT32 Bus; 1235 UINT16 Device; 1236 UINT16 Function; 1237 UINT16 DeviceControl; 1238 UINT8[2] Reserved1; 1239 UINT32 UncorrectableErrorMask; 1240 UINT32 UncorrectableErrorSeverity; 1241 UINT32 CorrectableErrorMask; 1242 UINT32 AdvancedErrorCapabilitiesAndControl; 1243 } 1244 /// PCI Express Bridge AER Structure Definition 1245 struct EFI_ACPI_5_0_PCI_EXPRESS_BRIDGE_AER_STRUCTURE 1246 { 1247 align(1): 1248 UINT16 Type; 1249 UINT16 SourceId; 1250 UINT8[2] Reserved0; 1251 UINT8 Flags; 1252 UINT8 Enabled; 1253 UINT32 NumberOfRecordsToPreAllocate; 1254 UINT32 MaxSectionsPerRecord; 1255 UINT32 Bus; 1256 UINT16 Device; 1257 UINT16 Function; 1258 UINT16 DeviceControl; 1259 UINT8[2] Reserved1; 1260 UINT32 UncorrectableErrorMask; 1261 UINT32 UncorrectableErrorSeverity; 1262 UINT32 CorrectableErrorMask; 1263 UINT32 AdvancedErrorCapabilitiesAndControl; 1264 UINT32 SecondaryUncorrectableErrorMask; 1265 UINT32 SecondaryUncorrectableErrorSeverity; 1266 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1267 } 1268 /// Generic Hardware Error Source Structure Definition 1269 struct EFI_ACPI_5_0_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE 1270 { 1271 align(1): 1272 UINT16 Type; 1273 UINT16 SourceId; 1274 UINT16 RelatedSourceId; 1275 UINT8 Flags; 1276 UINT8 Enabled; 1277 UINT32 NumberOfRecordsToPreAllocate; 1278 UINT32 MaxSectionsPerRecord; 1279 UINT32 MaxRawDataLength; 1280 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1281 EFI_ACPI_5_0_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1282 UINT32 ErrorStatusBlockLength; 1283 } 1284 /// Generic Error Status Definition 1285 struct EFI_ACPI_5_0_GENERIC_ERROR_STATUS_STRUCTURE 1286 { 1287 align(1): 1288 EFI_ACPI_5_0_ERROR_BLOCK_STATUS BlockStatus; 1289 UINT32 RawDataOffset; 1290 UINT32 RawDataLength; 1291 UINT32 DataLength; 1292 UINT32 ErrorSeverity; 1293 } 1294 /// ERST - Error Record Serialization Table 1295 struct EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_HEADER 1296 { 1297 align(1): 1298 EFI_ACPI_DESCRIPTION_HEADER Header; 1299 UINT32 SerializationHeaderSize; 1300 UINT8[4] Reserved0; 1301 UINT32 InstructionEntryCount; 1302 } 1303 /// ERST Version (as defined in ACPI 5.0 spec.) 1304 enum EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_REVISION = 0x01; 1305 /// ERST Serialization Actions 1306 enum EFI_ACPI_5_0_ERST_BEGIN_WRITE_OPERATION = 0x00; 1307 enum EFI_ACPI_5_0_ERST_BEGIN_READ_OPERATION = 0x01; 1308 enum EFI_ACPI_5_0_ERST_BEGIN_CLEAR_OPERATION = 0x02; 1309 enum EFI_ACPI_5_0_ERST_END_OPERATION = 0x03; 1310 enum EFI_ACPI_5_0_ERST_SET_RECORD_OFFSET = 0x04; 1311 enum EFI_ACPI_5_0_ERST_EXECUTE_OPERATION = 0x05; 1312 enum EFI_ACPI_5_0_ERST_CHECK_BUSY_STATUS = 0x06; 1313 enum EFI_ACPI_5_0_ERST_GET_COMMAND_STATUS = 0x07; 1314 enum EFI_ACPI_5_0_ERST_GET_RECORD_IDENTIFIER = 0x08; 1315 enum EFI_ACPI_5_0_ERST_SET_RECORD_IDENTIFIER = 0x09; 1316 enum EFI_ACPI_5_0_ERST_GET_RECORD_COUNT = 0x0A; 1317 enum EFI_ACPI_5_0_ERST_BEGIN_DUMMY_WRITE_OPERATION = 0x0B; 1318 enum EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE = 0x0D; 1319 enum EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH = 0x0E; 1320 enum EFI_ACPI_5_0_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES = 0x0F; 1321 /// ERST Action Command Status 1322 enum EFI_ACPI_5_0_ERST_STATUS_SUCCESS = 0x00; 1323 enum EFI_ACPI_5_0_ERST_STATUS_NOT_ENOUGH_SPACE = 0x01; 1324 enum EFI_ACPI_5_0_ERST_STATUS_HARDWARE_NOT_AVAILABLE = 0x02; 1325 enum EFI_ACPI_5_0_ERST_STATUS_FAILED = 0x03; 1326 enum EFI_ACPI_5_0_ERST_STATUS_RECORD_STORE_EMPTY = 0x04; 1327 enum EFI_ACPI_5_0_ERST_STATUS_RECORD_NOT_FOUND = 0x05; 1328 /// ERST Serialization Instructions 1329 enum EFI_ACPI_5_0_ERST_READ_REGISTER = 0x00; 1330 enum EFI_ACPI_5_0_ERST_READ_REGISTER_VALUE = 0x01; 1331 enum EFI_ACPI_5_0_ERST_WRITE_REGISTER = 0x02; 1332 enum EFI_ACPI_5_0_ERST_WRITE_REGISTER_VALUE = 0x03; 1333 enum EFI_ACPI_5_0_ERST_NOOP = 0x04; 1334 enum EFI_ACPI_5_0_ERST_LOAD_VAR1 = 0x05; 1335 enum EFI_ACPI_5_0_ERST_LOAD_VAR2 = 0x06; 1336 enum EFI_ACPI_5_0_ERST_STORE_VAR1 = 0x07; 1337 enum EFI_ACPI_5_0_ERST_ADD = 0x08; 1338 enum EFI_ACPI_5_0_ERST_SUBTRACT = 0x09; 1339 enum EFI_ACPI_5_0_ERST_ADD_VALUE = 0x0A; 1340 enum EFI_ACPI_5_0_ERST_SUBTRACT_VALUE = 0x0B; 1341 enum EFI_ACPI_5_0_ERST_STALL = 0x0C; 1342 enum EFI_ACPI_5_0_ERST_STALL_WHILE_TRUE = 0x0D; 1343 enum EFI_ACPI_5_0_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE = 0x0E; 1344 enum EFI_ACPI_5_0_ERST_GOTO = 0x0F; 1345 enum EFI_ACPI_5_0_ERST_SET_SRC_ADDRESS_BASE = 0x10; 1346 enum EFI_ACPI_5_0_ERST_SET_DST_ADDRESS_BASE = 0x11; 1347 enum EFI_ACPI_5_0_ERST_MOVE_DATA = 0x12; 1348 /// ERST Instruction Flags 1349 enum EFI_ACPI_5_0_ERST_PRESERVE_REGISTER = 0x01; 1350 /// ERST Serialization Instruction Entry 1351 struct EFI_ACPI_5_0_ERST_SERIALIZATION_INSTRUCTION_ENTRY 1352 { 1353 align(1): 1354 UINT8 SerializationAction; 1355 UINT8 Instruction; 1356 UINT8 Flags; 1357 UINT8 Reserved0; 1358 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1359 UINT64 Value; 1360 UINT64 Mask; 1361 } 1362 /// EINJ - Error Injection Table 1363 struct EFI_ACPI_5_0_ERROR_INJECTION_TABLE_HEADER 1364 { 1365 align(1): 1366 EFI_ACPI_DESCRIPTION_HEADER Header; 1367 UINT32 InjectionHeaderSize; 1368 UINT8 InjectionFlags; 1369 UINT8[3] Reserved0; 1370 UINT32 InjectionEntryCount; 1371 } 1372 /// EINJ Version (as defined in ACPI 5.0 spec.) 1373 enum EFI_ACPI_5_0_ERROR_INJECTION_TABLE_REVISION = 0x01; 1374 /// EINJ Error Injection Actions 1375 enum EFI_ACPI_5_0_EINJ_BEGIN_INJECTION_OPERATION = 0x00; 1376 enum EFI_ACPI_5_0_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE = 0x01; 1377 enum EFI_ACPI_5_0_EINJ_SET_ERROR_TYPE = 0x02; 1378 enum EFI_ACPI_5_0_EINJ_GET_ERROR_TYPE = 0x03; 1379 enum EFI_ACPI_5_0_EINJ_END_OPERATION = 0x04; 1380 enum EFI_ACPI_5_0_EINJ_EXECUTE_OPERATION = 0x05; 1381 enum EFI_ACPI_5_0_EINJ_CHECK_BUSY_STATUS = 0x06; 1382 enum EFI_ACPI_5_0_EINJ_GET_COMMAND_STATUS = 0x07; 1383 enum EFI_ACPI_5_0_EINJ_TRIGGER_ERROR = 0xFF; 1384 /// EINJ Action Command Status 1385 enum EFI_ACPI_5_0_EINJ_STATUS_SUCCESS = 0x00; 1386 enum EFI_ACPI_5_0_EINJ_STATUS_UNKNOWN_FAILURE = 0x01; 1387 enum EFI_ACPI_5_0_EINJ_STATUS_INVALID_ACCESS = 0x02; 1388 /// EINJ Error Type Definition 1389 enum EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_CORRECTABLE = (1 << 0); 1390 enum EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL = (1 << 1); 1391 enum EFI_ACPI_5_0_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL = (1 << 2); 1392 enum EFI_ACPI_5_0_EINJ_ERROR_MEMORY_CORRECTABLE = (1 << 3); 1393 enum EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL = (1 << 4); 1394 enum EFI_ACPI_5_0_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL = (1 << 5); 1395 enum EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE = (1 << 6); 1396 enum EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL = (1 << 7); 1397 enum EFI_ACPI_5_0_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL = (1 << 8); 1398 enum EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_CORRECTABLE = (1 << 9); 1399 enum EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL = (1 << 10); 1400 enum EFI_ACPI_5_0_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL = (1 << 11); /// EINJ Injection Instructions 1401 enum EFI_ACPI_5_0_EINJ_READ_REGISTER = 0x00; 1402 enum EFI_ACPI_5_0_EINJ_READ_REGISTER_VALUE = 0x01; 1403 enum EFI_ACPI_5_0_EINJ_WRITE_REGISTER = 0x02; 1404 enum EFI_ACPI_5_0_EINJ_WRITE_REGISTER_VALUE = 0x03; 1405 enum EFI_ACPI_5_0_EINJ_NOOP = 0x04; 1406 /// EINJ Instruction Flags 1407 enum EFI_ACPI_5_0_EINJ_PRESERVE_REGISTER = 0x01; 1408 /// EINJ Injection Instruction Entry 1409 struct EFI_ACPI_5_0_EINJ_INJECTION_INSTRUCTION_ENTRY 1410 { 1411 align(1): 1412 UINT8 InjectionAction; 1413 UINT8 Instruction; 1414 UINT8 Flags; 1415 UINT8 Reserved0; 1416 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1417 UINT64 Value; 1418 UINT64 Mask; 1419 } 1420 /// EINJ Trigger Action Table 1421 struct EFI_ACPI_5_0_EINJ_TRIGGER_ACTION_TABLE 1422 { 1423 align(1): 1424 UINT32 HeaderSize; 1425 UINT32 Revision; 1426 UINT32 TableSize; 1427 UINT32 EntryCount; 1428 } 1429 /// Platform Communications Channel Table (PCCT) 1430 struct EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER 1431 { 1432 align(1): 1433 EFI_ACPI_DESCRIPTION_HEADER Header; 1434 UINT32 Flags; 1435 UINT64 Reserved; 1436 } 1437 /// PCCT Version (as defined in ACPI 5.0 spec.) 1438 enum EFI_ACPI_5_0_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION = 0x01; 1439 /// PCCT Global Flags 1440 enum EFI_ACPI_5_0_PCCT_FLAGS_SCI_DOORBELL = BIT0; 1441 enum EFI_ACPI_5_0_PCCT_SUBSPACE_TYPE_GENERIC = 0x00; 1442 /// PCC Subspace Structure Header 1443 struct EFI_ACPI_5_0_PCCT_SUBSPACE_HEADER 1444 { 1445 align(1): 1446 UINT8 Type; 1447 UINT8 Length; 1448 } 1449 /// Generic Communications Subspace Structure 1450 struct EFI_ACPI_5_0_PCCT_SUBSPACE_GENERIC 1451 { 1452 align(1): 1453 UINT8 Type; 1454 UINT8 Length; 1455 UINT8[6] Reserved; 1456 UINT64 BaseAddress; 1457 UINT64 AddressLength; 1458 EFI_ACPI_5_0_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1459 UINT64 DoorbellPreserve; 1460 UINT64 DoorbellWrite; 1461 UINT32 NominalLatency; 1462 UINT32 MaximumPeriodicAccessRate; 1463 UINT16 MinimumRequestTurnaroundTime; 1464 } 1465 /// Generic Communications Channel Shared Memory Region 1466 struct EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND 1467 { 1468 align(1): 1469 UINT8 Command; 1470 mixin(bitfields!(UINT8, "Reserved", 7, UINT8, "GenerateSci", 1)); 1471 } 1472 1473 struct EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS 1474 { 1475 align(1): 1476 mixin(bitfields!(UINT8, "CommandComplete", 1, UINT8, "SciDoorbell", 1, 1477 UINT8, "Error", 1, UINT8, "PlatformNotification", 1, UINT8, "Reserved", 4)); 1478 UINT8 Reserved1; 1479 } 1480 1481 struct EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER 1482 { 1483 align(1): 1484 UINT32 Signature; 1485 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1486 EFI_ACPI_5_0_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1487 } 1488 /// "RSD PTR " Root System Description Pointer 1489 enum EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE = SIGNATURE_64('R', 1490 'S', 'D', ' ', 'P', 'T', 'R', ' '); /// "APIC" Multiple APIC Description Table 1491 enum EFI_ACPI_5_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('A', 'P', 1492 'I', 'C'); 1493 /// "BERT" Boot Error Record Table 1494 enum EFI_ACPI_5_0_BOOT_ERROR_RECORD_TABLE_SIGNATURE = SIGNATURE_32('B', 'E', 'R', 'T'); 1495 /// "BGRT" Boot Graphics Resource Table 1496 enum EFI_ACPI_5_0_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('B', 'G', 'R', 1497 'T'); 1498 /// "CPEP" Corrected Platform Error Polling Table 1499 enum EFI_ACPI_5_0_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE = SIGNATURE_32( 1500 'C', 'P', 'E', 'P'); 1501 /// "DSDT" Differentiated System Description Table 1502 enum EFI_ACPI_5_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 1503 'D', 'S', 'D', 'T'); 1504 /// "ECDT" Embedded Controller Boot Resources Table 1505 enum EFI_ACPI_5_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE = SIGNATURE_32( 1506 'E', 'C', 'D', 'T'); 1507 /// "EINJ" Error Injection Table 1508 enum EFI_ACPI_5_0_ERROR_INJECTION_TABLE_SIGNATURE = SIGNATURE_32('E', 'I', 'N', 'J'); 1509 /// "ERST" Error Record Serialization Table 1510 enum EFI_ACPI_5_0_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE = SIGNATURE_32('E', 'R', 1511 'S', 'T'); 1512 /// "FACP" Fixed ACPI Description Table 1513 enum EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('F', 'A', 'C', 1514 'P'); 1515 /// "FACS" Firmware ACPI Control Structure 1516 enum EFI_ACPI_5_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE = SIGNATURE_32('F', 'A', 1517 'C', 'S'); 1518 /// "FPDT" Firmware Performance Data Table 1519 enum EFI_ACPI_5_0_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE = SIGNATURE_32('F', 'P', 1520 'D', 'T'); 1521 /// "GTDT" Generic Timer Description Table 1522 enum EFI_ACPI_5_0_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('G', 'T', 1523 'D', 'T'); 1524 /// "HEST" Hardware Error Source Table 1525 enum EFI_ACPI_5_0_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE = SIGNATURE_32('H', 'E', 'S', 1526 'T'); 1527 /// "MPST" Memory Power State Table 1528 enum EFI_ACPI_5_0_MEMORY_POWER_STATE_TABLE_SIGNATURE = SIGNATURE_32('M', 'P', 'S', 1529 'T'); 1530 /// "MSCT" Maximum System Characteristics Table 1531 enum EFI_ACPI_5_0_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE = SIGNATURE_32('M', 1532 'S', 'C', 'T'); 1533 /// "PMTT" Platform Memory Topology Table 1534 enum EFI_ACPI_5_0_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE = SIGNATURE_32('P', 'M', 1535 'T', 'T'); 1536 /// "PSDT" Persistent System Description Table 1537 enum EFI_ACPI_5_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('P', 1538 'S', 'D', 'T'); 1539 /// "RASF" ACPI RAS Feature Table 1540 enum EFI_ACPI_5_0_ACPI_RAS_FEATURE_TABLE_SIGNATURE = SIGNATURE_32('R', 'A', 'S', 'F'); 1541 /// "RSDT" Root System Description Table 1542 enum EFI_ACPI_5_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('R', 'S', 1543 'D', 'T'); 1544 /// "SBST" Smart Battery Specification Table 1545 enum EFI_ACPI_5_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'B', 1546 'S', 'T'); 1547 /// "SLIT" System Locality Information Table 1548 enum EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'L', 1549 'I', 'T'); 1550 /// "SRAT" System Resource Affinity Table 1551 enum EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE = SIGNATURE_32('S', 'R', 1552 'A', 'T'); 1553 /// "SSDT" Secondary System Description Table 1554 enum EFI_ACPI_5_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('S', 1555 'S', 'D', 'T'); 1556 /// "XSDT" Extended System Description Table 1557 enum EFI_ACPI_5_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('X', 'S', 1558 'D', 'T'); 1559 /// "BOOT" MS Simple Boot Spec 1560 enum EFI_ACPI_5_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE = SIGNATURE_32('B', 'O', 'O', 'T'); 1561 /// "CSRT" MS Core System Resource Table 1562 enum EFI_ACPI_5_0_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('C', 'S', 'R', 1563 'T'); 1564 /// "DBG2" MS Debug Port 2 Spec 1565 enum EFI_ACPI_5_0_DEBUG_PORT_2_TABLE_SIGNATURE = SIGNATURE_32('D', 'B', 'G', '2'); 1566 /// "DBGP" MS Debug Port Spec 1567 enum EFI_ACPI_5_0_DEBUG_PORT_TABLE_SIGNATURE = SIGNATURE_32('D', 'B', 'G', 'P'); 1568 /// "DMAR" DMA Remapping Table 1569 enum EFI_ACPI_5_0_DMA_REMAPPING_TABLE_SIGNATURE = SIGNATURE_32('D', 'M', 'A', 'R'); 1570 /// "DRTM" Dynamic Root of Trust for Measurement Table 1571 enum EFI_ACPI_5_0_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE = SIGNATURE_32( 1572 'D', 'R', 'T', 'M'); 1573 /// "ETDT" Event Timer Description Table 1574 enum EFI_ACPI_5_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('E', 'T', 1575 'D', 'T'); 1576 /// "HPET" IA-PC High Precision Event Timer Table 1577 enum EFI_ACPI_5_0_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE = SIGNATURE_32('H', 'P', 1578 'E', 'T'); 1579 /// "iBFT" iSCSI Boot Firmware Table 1580 enum EFI_ACPI_5_0_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE = SIGNATURE_32('i', 'B', 'F', 1581 'T'); 1582 /// "IVRS" I/O Virtualization Reporting Structure 1583 enum EFI_ACPI_5_0_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE = SIGNATURE_32('I', 1584 'V', 'R', 'S'); 1585 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 1586 enum EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 1587 'M', 'C', 'F', 'G'); 1588 /// "MCHI" Management Controller Host Interface Table 1589 enum EFI_ACPI_5_0_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE = SIGNATURE_32( 1590 'M', 'C', 'H', 'I'); 1591 /// "MSDM" MS Data Management Table 1592 enum EFI_ACPI_5_0_DATA_MANAGEMENT_TABLE_SIGNATURE = SIGNATURE_32('M', 'S', 'D', 'M'); 1593 /// "SLIC" MS Software Licensing Table Specification 1594 enum EFI_ACPI_5_0_SOFTWARE_LICENSING_TABLE_SIGNATURE = SIGNATURE_32('S', 'L', 'I', 1595 'C'); 1596 /// "SPCR" Serial Port Concole Redirection Table 1597 enum EFI_ACPI_5_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE = SIGNATURE_32('S', 1598 'P', 'C', 'R'); 1599 /// "SPMI" Server Platform Management Interface Table 1600 enum EFI_ACPI_5_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE = SIGNATURE_32( 1601 'S', 'P', 'M', 'I'); 1602 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 1603 enum EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE = SIGNATURE_32( 1604 'T', 'C', 'P', 'A'); 1605 /// "TPM2" Trusted Computing Platform 1 Table 1606 enum EFI_ACPI_5_0_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE = SIGNATURE_32('T', 1607 'P', 'M', '2'); 1608 /// "UEFI" UEFI ACPI Data Table 1609 enum EFI_ACPI_5_0_UEFI_ACPI_DATA_TABLE_SIGNATURE = SIGNATURE_32('U', 'E', 'F', 'I'); 1610 /// "WAET" Windows ACPI Emulated Devices Table 1611 enum EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE = SIGNATURE_32('W', 1612 'A', 'E', 'T'); 1613 enum EFI_ACPI_5_0_WINDOWS_ACPI_ENLIGHTENMENT_TABLE_SIGNATURE = EFI_ACPI_5_0_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE; 1614 /// "WDAT" Watchdog Action Table 1615 enum EFI_ACPI_5_0_WATCHDOG_ACTION_TABLE_SIGNATURE = SIGNATURE_32('W', 'D', 'A', 'T'); /// "WDRT" Watchdog Resource Table 1616 enum EFI_ACPI_5_0_WATCHDOG_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('W', 'D', 'R', 'T'); 1617 /// "WPBT" MS Platform Binary Table 1618 enum EFI_ACPI_5_0_PLATFORM_BINARY_TABLE_SIGNATURE = SIGNATURE_32('W', 'P', 'B', 'T');