1 /** 2 Based on IndustryStandard/Acpi51.h, original notice: 3 4 ACPI 5.1 definitions from the ACPI Specification Revision 5.1 July, 2014. 5 6 Copyright (c) 2014 Hewlett-Packard Development Company, L.P. 7 Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved. 8 This program and the accompanying materials 9 are licensed and made available under the terms and conditions of the BSD License 10 which accompanies this distribution. The full text of the license may be found at 11 http://opensource.org/licenses/bsd-license.php 12 13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 15 **/ 16 module uefi.acpi51; 17 import uefi.base; 18 import uefi.base_type; 19 import uefi.acpiaml; 20 import uefi.acpi10; 21 import uefi.acpi20; 22 import uefi.acpi30; 23 import uefi.acpi40; 24 import uefi.acpi50; 25 26 public: 27 extern (C): 28 // FIXME: INCLUDE <IndustryStandard/Acpi50.h> 29 /// ACPI 5.1 Generic Address Space definition 30 struct EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE 31 { 32 align(1): 33 UINT8 AddressSpaceId; 34 UINT8 RegisterBitWidth; 35 UINT8 RegisterBitOffset; 36 UINT8 AccessSize; 37 UINT64 Address; 38 } 39 40 enum EFI_ACPI_5_1_SYSTEM_MEMORY = 0; 41 enum EFI_ACPI_5_1_SYSTEM_IO = 1; 42 enum EFI_ACPI_5_1_PCI_CONFIGURATION_SPACE = 2; 43 enum EFI_ACPI_5_1_EMBEDDED_CONTROLLER = 3; 44 enum EFI_ACPI_5_1_SMBUS = 4; 45 enum EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL = 0x0A; 46 enum EFI_ACPI_5_1_FUNCTIONAL_FIXED_HARDWARE = 0x7F; 47 enum EFI_ACPI_5_1_UNDEFINED = 0; 48 enum EFI_ACPI_5_1_BYTE = 1; 49 enum EFI_ACPI_5_1_WORD = 2; 50 enum EFI_ACPI_5_1_DWORD = 3; 51 enum EFI_ACPI_5_1_QWORD = 4; 52 /// Root System Description Pointer Structure 53 struct EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER 54 { 55 align(1): 56 UINT64 Signature; 57 UINT8 Checksum; 58 UINT8[6] OemId; 59 UINT8 Revision; 60 UINT32 RsdtAddress; 61 UINT32 Length; 62 UINT64 XsdtAddress; 63 UINT8 ExtendedChecksum; 64 UINT8[3] Reserved; 65 } 66 /// RSD_PTR Revision (as defined in ACPI 5.1 spec.) 67 enum EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION = 0x02; ///< ACPISpec (Revision 5.1) says current value is 2 68 /// Common table header, this prefaces all ACPI tables, including FACS, but 69 /// excluding the RSD PTR structure 70 struct EFI_ACPI_5_1_COMMON_HEADER 71 { 72 align(1): 73 UINT32 Signature; 74 UINT32 Length; 75 } 76 /// RSDT Revision (as defined in ACPI 5.1 spec.) 77 enum EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 78 /// XSDT Revision (as defined in ACPI 5.1 spec.) 79 enum EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x01; 80 /// Fixed ACPI Description Table Structure (FADT) 81 struct EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE 82 { 83 align(1): 84 EFI_ACPI_DESCRIPTION_HEADER Header; 85 UINT32 FirmwareCtrl; 86 UINT32 Dsdt; 87 UINT8 Reserved0; 88 UINT8 PreferredPmProfile; 89 UINT16 SciInt; 90 UINT32 SmiCmd; 91 UINT8 AcpiEnable; 92 UINT8 AcpiDisable; 93 UINT8 S4BiosReq; 94 UINT8 PstateCnt; 95 UINT32 Pm1aEvtBlk; 96 UINT32 Pm1bEvtBlk; 97 UINT32 Pm1aCntBlk; 98 UINT32 Pm1bCntBlk; 99 UINT32 Pm2CntBlk; 100 UINT32 PmTmrBlk; 101 UINT32 Gpe0Blk; 102 UINT32 Gpe1Blk; 103 UINT8 Pm1EvtLen; 104 UINT8 Pm1CntLen; 105 UINT8 Pm2CntLen; 106 UINT8 PmTmrLen; 107 UINT8 Gpe0BlkLen; 108 UINT8 Gpe1BlkLen; 109 UINT8 Gpe1Base; 110 UINT8 CstCnt; 111 UINT16 PLvl2Lat; 112 UINT16 PLvl3Lat; 113 UINT16 FlushSize; 114 UINT16 FlushStride; 115 UINT8 DutyOffset; 116 UINT8 DutyWidth; 117 UINT8 DayAlrm; 118 UINT8 MonAlrm; 119 UINT8 Century; 120 UINT16 IaPcBootArch; 121 UINT8 Reserved1; 122 UINT32 Flags; 123 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ResetReg; 124 UINT8 ResetValue; 125 UINT16 ArmBootArch; 126 UINT8 MinorVersion; 127 UINT64 XFirmwareCtrl; 128 UINT64 XDsdt; 129 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk; 130 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk; 131 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk; 132 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk; 133 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk; 134 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk; 135 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe0Blk; 136 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE XGpe1Blk; 137 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepControlReg; 138 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE SleepStatusReg; 139 } 140 /// FADT Version (as defined in ACPI 5.1 spec.) 141 enum EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_REVISION = 0x05; 142 enum EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION = 0x01; 143 enum EFI_ACPI_5_1_PM_PROFILE_UNSPECIFIED = 0; 144 enum EFI_ACPI_5_1_PM_PROFILE_DESKTOP = 1; 145 enum EFI_ACPI_5_1_PM_PROFILE_MOBILE = 2; 146 enum EFI_ACPI_5_1_PM_PROFILE_WORKSTATION = 3; 147 enum EFI_ACPI_5_1_PM_PROFILE_ENTERPRISE_SERVER = 4; 148 enum EFI_ACPI_5_1_PM_PROFILE_SOHO_SERVER = 5; 149 enum EFI_ACPI_5_1_PM_PROFILE_APPLIANCE_PC = 6; 150 enum EFI_ACPI_5_1_PM_PROFILE_PERFORMANCE_SERVER = 7; 151 enum EFI_ACPI_5_1_PM_PROFILE_TABLET = 8; 152 enum EFI_ACPI_5_1_LEGACY_DEVICES = BIT0; 153 enum EFI_ACPI_5_1_8042 = BIT1; 154 enum EFI_ACPI_5_1_VGA_NOT_PRESENT = BIT2; 155 enum EFI_ACPI_5_1_MSI_NOT_SUPPORTED = BIT3; 156 enum EFI_ACPI_5_1_PCIE_ASPM_CONTROLS = BIT4; 157 enum EFI_ACPI_5_1_CMOS_RTC_NOT_PRESENT = BIT5; 158 enum EFI_ACPI_5_1_ARM_PSCI_COMPLIANT = BIT0; 159 enum EFI_ACPI_5_1_ARM_PSCI_USE_HVC = BIT1; 160 enum EFI_ACPI_5_1_WBINVD = BIT0; 161 enum EFI_ACPI_5_1_WBINVD_FLUSH = BIT1; 162 enum EFI_ACPI_5_1_PROC_C1 = BIT2; 163 enum EFI_ACPI_5_1_P_LVL2_UP = BIT3; 164 enum EFI_ACPI_5_1_PWR_BUTTON = BIT4; 165 enum EFI_ACPI_5_1_SLP_BUTTON = BIT5; 166 enum EFI_ACPI_5_1_FIX_RTC = BIT6; 167 enum EFI_ACPI_5_1_RTC_S4 = BIT7; 168 enum EFI_ACPI_5_1_TMR_VAL_EXT = BIT8; 169 enum EFI_ACPI_5_1_DCK_CAP = BIT9; 170 enum EFI_ACPI_5_1_RESET_REG_SUP = BIT10; 171 enum EFI_ACPI_5_1_SEALED_CASE = BIT11; 172 enum EFI_ACPI_5_1_HEADLESS = BIT12; 173 enum EFI_ACPI_5_1_CPU_SW_SLP = BIT13; 174 enum EFI_ACPI_5_1_PCI_EXP_WAK = BIT14; 175 enum EFI_ACPI_5_1_USE_PLATFORM_CLOCK = BIT15; 176 enum EFI_ACPI_5_1_S4_RTC_STS_VALID = BIT16; 177 enum EFI_ACPI_5_1_REMOTE_POWER_ON_CAPABLE = BIT17; 178 enum EFI_ACPI_5_1_FORCE_APIC_CLUSTER_MODEL = BIT18; 179 enum EFI_ACPI_5_1_FORCE_APIC_PHYSICAL_DESTINATION_MODE = BIT19; 180 enum EFI_ACPI_5_1_HW_REDUCED_ACPI = BIT20; 181 enum EFI_ACPI_5_1_LOW_POWER_S0_IDLE_CAPABLE = BIT21; 182 /// Firmware ACPI Control Structure 183 struct EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE 184 { 185 align(1): 186 UINT32 Signature; 187 UINT32 Length; 188 UINT32 HardwareSignature; 189 UINT32 FirmwareWakingVector; 190 UINT32 GlobalLock; 191 UINT32 Flags; 192 UINT64 XFirmwareWakingVector; 193 UINT8 Version; 194 UINT8[3] Reserved0; 195 UINT32 OspmFlags; 196 UINT8[24] Reserved1; 197 } 198 /// FACS Version (as defined in ACPI 5.1 spec.) 199 enum EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION = 0x02; 200 /// Firmware Control Structure Feature Flags 201 /// All other bits are reserved and must be set to 0. 202 enum EFI_ACPI_5_1_S4BIOS_F = BIT0; 203 enum EFI_ACPI_5_1_64BIT_WAKE_SUPPORTED_F = BIT1; 204 /// OSPM Enabled Firmware Control Structure Flags 205 /// All other bits are reserved and must be set to 0. 206 enum EFI_ACPI_5_1_OSPM_64BIT_WAKE_F = BIT0; 207 enum EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x02; 208 enum EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION = 0x02; 209 /// Multiple APIC Description Table header definition. The rest of the table 210 /// must be defined in a platform specific manner. 211 struct EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER 212 { 213 align(1): 214 EFI_ACPI_DESCRIPTION_HEADER Header; 215 UINT32 LocalApicAddress; 216 UINT32 Flags; 217 } 218 /// MADT Revision (as defined in ACPI 5.1 spec.) 219 enum EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION = 0x03; 220 /// Multiple APIC Flags 221 /// All other bits are reserved and must be set to 0. 222 enum EFI_ACPI_5_1_PCAT_COMPAT = BIT0; 223 enum EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC = 0x00; 224 enum EFI_ACPI_5_1_IO_APIC = 0x01; 225 enum EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE = 0x02; 226 enum EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE = 0x03; 227 enum EFI_ACPI_5_1_LOCAL_APIC_NMI = 0x04; 228 enum EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE = 0x05; 229 enum EFI_ACPI_5_1_IO_SAPIC = 0x06; 230 enum EFI_ACPI_5_1_LOCAL_SAPIC = 0x07; 231 enum EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES = 0x08; 232 enum EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC = 0x09; 233 enum EFI_ACPI_5_1_LOCAL_X2APIC_NMI = 0x0A; 234 enum EFI_ACPI_5_1_GIC = 0x0B; 235 enum EFI_ACPI_5_1_GICD = 0x0C; 236 enum EFI_ACPI_5_1_GIC_MSI_FRAME = 0x0D; 237 enum EFI_ACPI_5_1_GICR = 0x0E; 238 /// Processor Local APIC Structure Definition 239 struct EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_STRUCTURE 240 { 241 align(1): 242 UINT8 Type; 243 UINT8 Length; 244 UINT8 AcpiProcessorId; 245 UINT8 ApicId; 246 UINT32 Flags; 247 } 248 /// Local APIC Flags. All other bits are reserved and must be 0. 249 enum EFI_ACPI_5_1_LOCAL_APIC_ENABLED = BIT0; 250 /// IO APIC Structure 251 struct EFI_ACPI_5_1_IO_APIC_STRUCTURE 252 { 253 align(1): 254 UINT8 Type; 255 UINT8 Length; 256 UINT8 IoApicId; 257 UINT8 Reserved; 258 UINT32 IoApicAddress; 259 UINT32 GlobalSystemInterruptBase; 260 } 261 /// Interrupt Source Override Structure 262 struct EFI_ACPI_5_1_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE 263 { 264 align(1): 265 UINT8 Type; 266 UINT8 Length; 267 UINT8 Bus; 268 UINT8 Source; 269 UINT32 GlobalSystemInterrupt; 270 UINT16 Flags; 271 } 272 /// Platform Interrupt Sources Structure Definition 273 struct EFI_ACPI_5_1_PLATFORM_INTERRUPT_APIC_STRUCTURE 274 { 275 align(1): 276 UINT8 Type; 277 UINT8 Length; 278 UINT16 Flags; 279 UINT8 InterruptType; 280 UINT8 ProcessorId; 281 UINT8 ProcessorEid; 282 UINT8 IoSapicVector; 283 UINT32 GlobalSystemInterrupt; 284 UINT32 PlatformInterruptSourceFlags; 285 UINT8 CpeiProcessorOverride; 286 UINT8[31] Reserved; 287 } 288 289 enum EFI_ACPI_5_1_POLARITY = (3 << 0); 290 enum EFI_ACPI_5_1_TRIGGER_MODE = (3 << 2); 291 /// Non-Maskable Interrupt Source Structure 292 struct EFI_ACPI_5_1_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE 293 { 294 align(1): 295 UINT8 Type; 296 UINT8 Length; 297 UINT16 Flags; 298 UINT32 GlobalSystemInterrupt; 299 } 300 /// Local APIC NMI Structure 301 struct EFI_ACPI_5_1_LOCAL_APIC_NMI_STRUCTURE 302 { 303 align(1): 304 UINT8 Type; 305 UINT8 Length; 306 UINT8 AcpiProcessorId; 307 UINT16 Flags; 308 UINT8 LocalApicLint; 309 } 310 /// Local APIC Address Override Structure 311 struct EFI_ACPI_5_1_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE 312 { 313 align(1): 314 UINT8 Type; 315 UINT8 Length; 316 UINT16 Reserved; 317 UINT64 LocalApicAddress; 318 } 319 /// IO SAPIC Structure 320 struct EFI_ACPI_5_1_IO_SAPIC_STRUCTURE 321 { 322 align(1): 323 UINT8 Type; 324 UINT8 Length; 325 UINT8 IoApicId; 326 UINT8 Reserved; 327 UINT32 GlobalSystemInterruptBase; 328 UINT64 IoSapicAddress; 329 } 330 /// Local SAPIC Structure 331 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String 332 struct EFI_ACPI_5_1_PROCESSOR_LOCAL_SAPIC_STRUCTURE 333 { 334 align(1): 335 UINT8 Type; 336 UINT8 Length; 337 UINT8 AcpiProcessorId; 338 UINT8 LocalSapicId; 339 UINT8 LocalSapicEid; 340 UINT8[3] Reserved; 341 UINT32 Flags; 342 UINT32 ACPIProcessorUIDValue; 343 } 344 /// Platform Interrupt Sources Structure 345 struct EFI_ACPI_5_1_PLATFORM_INTERRUPT_SOURCES_STRUCTURE 346 { 347 align(1): 348 UINT8 Type; 349 UINT8 Length; 350 UINT16 Flags; 351 UINT8 InterruptType; 352 UINT8 ProcessorId; 353 UINT8 ProcessorEid; 354 UINT8 IoSapicVector; 355 UINT32 GlobalSystemInterrupt; 356 UINT32 PlatformInterruptSourceFlags; 357 } 358 /// Platform Interrupt Source Flags. 359 /// All other bits are reserved and must be set to 0. 360 enum EFI_ACPI_5_1_CPEI_PROCESSOR_OVERRIDE = BIT0; 361 /// Processor Local x2APIC Structure Definition 362 struct EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_STRUCTURE 363 { 364 align(1): 365 UINT8 Type; 366 UINT8 Length; 367 UINT8[2] Reserved; 368 UINT32 X2ApicId; 369 UINT32 Flags; 370 UINT32 AcpiProcessorUid; 371 } 372 /// Local x2APIC NMI Structure 373 struct EFI_ACPI_5_1_LOCAL_X2APIC_NMI_STRUCTURE 374 { 375 align(1): 376 UINT8 Type; 377 UINT8 Length; 378 UINT16 Flags; 379 UINT32 AcpiProcessorUid; 380 UINT8 LocalX2ApicLint; 381 UINT8[3] Reserved; 382 } 383 /// GIC Structure 384 struct EFI_ACPI_5_1_GIC_STRUCTURE 385 { 386 align(1): 387 UINT8 Type; 388 UINT8 Length; 389 UINT16 Reserved; 390 UINT32 CPUInterfaceNumber; 391 UINT32 AcpiProcessorUid; 392 UINT32 Flags; 393 UINT32 ParkingProtocolVersion; 394 UINT32 PerformanceInterruptGsiv; 395 UINT64 ParkedAddress; 396 UINT64 PhysicalBaseAddress; 397 UINT64 GICV; 398 UINT64 GICH; 399 UINT32 VGICMaintenanceInterrupt; 400 UINT64 GICRBaseAddress; 401 UINT64 MPIDR; 402 } 403 /// GIC Flags. All other bits are reserved and must be 0. 404 enum EFI_ACPI_5_1_GIC_ENABLED = BIT0; 405 enum EFI_ACPI_5_1_PERFORMANCE_INTERRUPT_MODEL = BIT1; 406 enum EFI_ACPI_5_1_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS = BIT2; 407 /// GIC Distributor Structure 408 struct EFI_ACPI_5_1_GIC_DISTRIBUTOR_STRUCTURE 409 { 410 align(1): 411 UINT8 Type; 412 UINT8 Length; 413 UINT16 Reserved1; 414 UINT32 GicId; 415 UINT64 PhysicalBaseAddress; 416 UINT32 SystemVectorBase; 417 UINT32 Reserved2; 418 } 419 /// GIC MSI Frame Structure 420 struct EFI_ACPI_5_1_GIC_MSI_FRAME_STRUCTURE 421 { 422 align(1): 423 UINT8 Type; 424 UINT8 Length; 425 UINT16 Reserved1; 426 UINT32 GicMsiFrameId; 427 UINT64 PhysicalBaseAddress; 428 UINT32 Flags; 429 UINT16 SPICount; 430 UINT16 SPIBase; 431 } 432 /// GIC MSI Frame Flags. All other bits are reserved and must be 0. 433 enum EFI_ACPI_5_1_SPI_COUNT_BASE_SELECT = BIT0; 434 /// GICR Structure 435 struct EFI_ACPI_5_1_GICR_STRUCTURE 436 { 437 align(1): 438 UINT8 Type; 439 UINT8 Length; 440 UINT16 Reserved; 441 UINT64 DiscoveryRangeBaseAddress; 442 UINT32 DiscoveryRangeLength; 443 } 444 /// Smart Battery Description Table (SBST) 445 struct EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE 446 { 447 align(1): 448 EFI_ACPI_DESCRIPTION_HEADER Header; 449 UINT32 WarningEnergyLevel; 450 UINT32 LowEnergyLevel; 451 UINT32 CriticalEnergyLevel; 452 } 453 /// SBST Version (as defined in ACPI 5.1 spec.) 454 enum EFI_ACPI_5_1_SMART_BATTERY_DESCRIPTION_TABLE_REVISION = 0x01; 455 /// Embedded Controller Boot Resources Table (ECDT) 456 /// The table is followed by a null terminated ASCII string that contains 457 /// a fully qualified reference to the name space object. 458 struct EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE 459 { 460 align(1): 461 EFI_ACPI_DESCRIPTION_HEADER Header; 462 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcControl; 463 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE EcData; 464 UINT32 Uid; 465 UINT8 GpeBit; 466 } 467 /// ECDT Version (as defined in ACPI 5.1 spec.) 468 enum EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION = 0x01; 469 /// System Resource Affinity Table (SRAT). The rest of the table 470 /// must be defined in a platform specific manner. 471 struct EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER 472 { 473 align(1): 474 EFI_ACPI_DESCRIPTION_HEADER Header; 475 UINT32 Reserved1; ///< Must be set to 1 476 UINT64 Reserved2; 477 } 478 /// SRAT Version (as defined in ACPI 5.1 spec.) 479 enum EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION = 0x03; 480 enum EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY = 0x00; 481 enum EFI_ACPI_5_1_MEMORY_AFFINITY = 0x01; 482 enum EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY = 0x02; 483 enum EFI_ACPI_5_1_GICC_AFFINITY = 0x03; 484 /// Processor Local APIC/SAPIC Affinity Structure Definition 485 struct EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE 486 { 487 align(1): 488 UINT8 Type; 489 UINT8 Length; 490 UINT8 ProximityDomain7To0; 491 UINT8 ApicId; 492 UINT32 Flags; 493 UINT8 LocalSapicEid; 494 UINT8[3] ProximityDomain31To8; 495 UINT32 ClockDomain; 496 } 497 /// Local APIC/SAPIC Flags. All other bits are reserved and must be 0. 498 enum EFI_ACPI_5_1_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED = (1 << 0); 499 /// Memory Affinity Structure Definition 500 struct EFI_ACPI_5_1_MEMORY_AFFINITY_STRUCTURE 501 { 502 align(1): 503 UINT8 Type; 504 UINT8 Length; 505 UINT32 ProximityDomain; 506 UINT16 Reserved1; 507 UINT32 AddressBaseLow; 508 UINT32 AddressBaseHigh; 509 UINT32 LengthLow; 510 UINT32 LengthHigh; 511 UINT32 Reserved2; 512 UINT32 Flags; 513 UINT64 Reserved3; 514 } 515 516 enum EFI_ACPI_5_1_MEMORY_ENABLED = (1 << 0); 517 enum EFI_ACPI_5_1_MEMORY_HOT_PLUGGABLE = (1 << 1); 518 enum EFI_ACPI_5_1_MEMORY_NONVOLATILE = (1 << 2); 519 /// Processor Local x2APIC Affinity Structure Definition 520 struct EFI_ACPI_5_1_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE 521 { 522 align(1): 523 UINT8 Type; 524 UINT8 Length; 525 UINT8[2] Reserved1; 526 UINT32 ProximityDomain; 527 UINT32 X2ApicId; 528 UINT32 Flags; 529 UINT32 ClockDomain; 530 UINT8[4] Reserved2; 531 } 532 /// GICC Affinity Structure Definition 533 struct EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE 534 { 535 align(1): 536 UINT8 Type; 537 UINT8 Length; 538 UINT32 ProximityDomain; 539 UINT32 AcpiProcessorUid; 540 UINT32 Flags; 541 UINT32 ClockDomain; 542 } 543 /// GICC Flags. All other bits are reserved and must be 0. 544 enum EFI_ACPI_5_1_GICC_ENABLED = (1 << 0); 545 /// System Locality Distance Information Table (SLIT). 546 /// The rest of the table is a matrix. 547 struct EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER 548 { 549 align(1): 550 EFI_ACPI_DESCRIPTION_HEADER Header; 551 UINT64 NumberOfSystemLocalities; 552 } 553 /// SLIT Version (as defined in ACPI 5.1 spec.) 554 enum EFI_ACPI_5_1_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION = 0x01; 555 /// Corrected Platform Error Polling Table (CPEP) 556 struct EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER 557 { 558 align(1): 559 EFI_ACPI_DESCRIPTION_HEADER Header; 560 UINT8[8] Reserved; 561 } 562 /// CPEP Version (as defined in ACPI 5.1 spec.) 563 enum EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION = 0x01; 564 enum EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC = 0x00; 565 /// Corrected Platform Error Polling Processor Structure Definition 566 struct EFI_ACPI_5_1_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE 567 { 568 align(1): 569 UINT8 Type; 570 UINT8 Length; 571 UINT8 ProcessorId; 572 UINT8 ProcessorEid; 573 UINT32 PollingInterval; 574 } 575 /// Maximum System Characteristics Table (MSCT) 576 struct EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER 577 { 578 align(1): 579 EFI_ACPI_DESCRIPTION_HEADER Header; 580 UINT32 OffsetProxDomInfo; 581 UINT32 MaximumNumberOfProximityDomains; 582 UINT32 MaximumNumberOfClockDomains; 583 UINT64 MaximumPhysicalAddress; 584 } 585 /// MSCT Version (as defined in ACPI 5.1 spec.) 586 enum EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION = 0x01; 587 /// Maximum Proximity Domain Information Structure Definition 588 struct EFI_ACPI_5_1_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE 589 { 590 align(1): 591 UINT8 Revision; 592 UINT8 Length; 593 UINT32 ProximityDomainRangeLow; 594 UINT32 ProximityDomainRangeHigh; 595 UINT32 MaximumProcessorCapacity; 596 UINT64 MaximumMemoryCapacity; 597 } 598 /// ACPI RAS Feature Table definition. 599 struct EFI_ACPI_5_1_RAS_FEATURE_TABLE 600 { 601 align(1): 602 EFI_ACPI_DESCRIPTION_HEADER Header; 603 UINT8[12] PlatformCommunicationChannelIdentifier; 604 } 605 /// RASF Version (as defined in ACPI 5.1 spec.) 606 enum EFI_ACPI_5_1_RAS_FEATURE_TABLE_REVISION = 0x01; 607 /// ACPI RASF Platform Communication Channel Shared Memory Region definition. 608 struct EFI_ACPI_5_1_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION 609 { 610 align(1): 611 UINT32 Signature; 612 UINT16 Command; 613 UINT16 Status; 614 UINT16 Version; 615 UINT8[16] RASCapabilities; 616 UINT8[16] SetRASCapabilities; 617 UINT16 NumberOfRASFParameterBlocks; 618 UINT32 SetRASCapabilitiesStatus; 619 } 620 /// ACPI RASF PCC command code 621 enum EFI_ACPI_5_1_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND = 0x01; 622 /// ACPI RASF Platform RAS Capabilities 623 enum EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED = 0x01; 624 enum EFI_ACPI_5_1_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPOTED_AND_EXPOSED_TO_SOFTWARE = 0x02; 625 /// ACPI RASF Parameter Block structure for PATROL_SCRUB 626 struct EFI_ACPI_5_1_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE 627 { 628 align(1): 629 UINT16 Type; 630 UINT16 Version; 631 UINT16 Length; 632 UINT16 PatrolScrubCommand; 633 UINT64[2] RequestedAddressRange; 634 UINT64[2] ActualAddressRange; 635 UINT16 Flags; 636 UINT8 RequestedSpeed; 637 } 638 /// ACPI RASF Patrol Scrub command 639 enum EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS = 0x01; 640 enum EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER = 0x02; 641 enum EFI_ACPI_5_1_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER = 0x03; 642 /// Memory Power State Table definition. 643 struct EFI_ACPI_5_1_MEMORY_POWER_STATUS_TABLE 644 { 645 align(1): 646 EFI_ACPI_DESCRIPTION_HEADER Header; 647 UINT8 PlatformCommunicationChannelIdentifier; 648 UINT8[3] Reserved; 649 // Memory Power Node Structure 650 // Memory Power State Characteristics 651 } 652 /// MPST Version (as defined in ACPI 5.1 spec.) 653 enum EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_REVISION = 0x01; 654 /// MPST Platform Communication Channel Shared Memory Region definition. 655 struct EFI_ACPI_5_1_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION 656 { 657 align(1): 658 UINT32 Signature; 659 UINT16 Command; 660 UINT16 Status; 661 UINT32 MemoryPowerCommandRegister; 662 UINT32 MemoryPowerStatusRegister; 663 UINT32 PowerStateId; 664 UINT32 MemoryPowerNodeId; 665 UINT64 MemoryEnergyConsumed; 666 UINT64 ExpectedAveragePowerComsuned; 667 } 668 /// ACPI MPST PCC command code 669 enum EFI_ACPI_5_1_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND = 0x03; 670 /// ACPI MPST Memory Power command 671 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE = 0x01; 672 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE = 0x02; 673 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED = 0x03; 674 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED = 0x04; 675 /// MPST Memory Power Node Table 676 struct EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE 677 { 678 align(1): 679 UINT8 PowerStateValue; 680 UINT8 PowerStateInformationIndex; 681 } 682 683 struct EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE 684 { 685 align(1): 686 UINT8 Flag; 687 UINT8 Reserved; 688 UINT16 MemoryPowerNodeId; 689 UINT32 Length; 690 UINT64 AddressBase; 691 UINT64 AddressLength; 692 UINT32 NumberOfPowerStates; 693 UINT32 NumberOfPhysicalComponents; 694 //EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE MemoryPowerState[NumberOfPowerStates]; 695 //UINT16 PhysicalComponentIdentifier[NumberOfPhysicalComponents]; 696 } 697 698 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE = 0x01; 699 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED = 0x02; 700 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE = 0x04; 701 struct EFI_ACPI_5_1_MPST_MEMORY_POWER_NODE_TABLE 702 { 703 align(1): 704 UINT16 MemoryPowerNodeCount; 705 UINT8[2] Reserved; 706 } 707 /// MPST Memory Power State Characteristics Table 708 struct EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE 709 { 710 align(1): 711 UINT8 PowerStateStructureID; 712 UINT8 Flag; 713 UINT16 Reserved; 714 UINT32 AveragePowerConsumedInMPS0; 715 UINT32 RelativePowerSavingToMPS0; 716 UINT64 ExitLatencyToMPS0; 717 } 718 719 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED = 0x01; 720 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY = 0x02; 721 enum EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT = 0x04; 722 struct EFI_ACPI_5_1_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE 723 { 724 align(1): 725 UINT16 MemoryPowerStateCharacteristicsCount; 726 UINT8[2] Reserved; 727 } 728 /// Memory Topology Table definition. 729 struct EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE 730 { 731 align(1): 732 EFI_ACPI_DESCRIPTION_HEADER Header; 733 UINT32 Reserved; 734 } 735 /// PMTT Version (as defined in ACPI 5.1 spec.) 736 enum EFI_ACPI_5_1_MEMORY_TOPOLOGY_TABLE_REVISION = 0x01; 737 /// Common Memory Aggregator Device Structure. 738 struct EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 739 { 740 align(1): 741 UINT8 Type; 742 UINT8 Reserved; 743 UINT16 Length; 744 UINT16 Flags; 745 UINT16 Reserved1; 746 } 747 /// Memory Aggregator Device Type 748 enum EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_SOCKET = 0x1; 749 enum EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_MEMORY_CONTROLLER = 0x2; 750 enum EFI_ACPI_5_1_PMMT_MEMORY_AGGREGATOR_DEVICE_TYPE_DIMM = 0x3; 751 /// Socket Memory Aggregator Device Structure. 752 struct EFI_ACPI_5_1_PMMT_SOCKET_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 753 { 754 align(1): 755 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 756 UINT16 SocketIdentifier; 757 UINT16 Reserved; 758 //EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE MemoryController[]; 759 } 760 /// MemoryController Memory Aggregator Device Structure. 761 struct EFI_ACPI_5_1_PMMT_MEMORY_CONTROLLER_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 762 { 763 align(1): 764 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 765 UINT32 ReadLatency; 766 UINT32 WriteLatency; 767 UINT32 ReadBandwidth; 768 UINT32 WriteBandwidth; 769 UINT16 OptimalAccessUnit; 770 UINT16 OptimalAccessAlignment; 771 UINT16 Reserved; 772 UINT16 NumberOfProximityDomains; 773 //UINT32 ProximityDomain[NumberOfProximityDomains]; 774 //EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE PhysicalComponent[]; 775 } 776 /// DIMM Memory Aggregator Device Structure. 777 struct EFI_ACPI_5_1_PMMT_DIMM_MEMORY_AGGREGATOR_DEVICE_STRUCTURE 778 { 779 align(1): 780 EFI_ACPI_5_1_PMMT_COMMON_MEMORY_AGGREGATOR_DEVICE_STRUCTURE Header; 781 UINT16 PhysicalComponentIdentifier; 782 UINT16 Reserved; 783 UINT32 SizeOfDimm; 784 UINT32 SmbiosHandle; 785 } 786 /// Boot Graphics Resource Table definition. 787 struct EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE 788 { 789 align(1): 790 EFI_ACPI_DESCRIPTION_HEADER Header; 791 /// 792 /// 2-bytes (16 bit) version ID. This value must be 1. 793 /// 794 UINT16 Version; 795 /// 796 /// 1-byte status field indicating current status about the table. 797 /// Bits[7:1] = Reserved (must be zero) 798 /// Bit [0] = Valid. A one indicates the boot image graphic is valid. 799 /// 800 UINT8 Status; 801 /// 802 /// 1-byte enumerated type field indicating format of the image. 803 /// 0 = Bitmap 804 /// 1 - 255 Reserved (for future use) 805 /// 806 UINT8 ImageType; 807 /// 808 /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy 809 /// of the image bitmap. 810 /// 811 UINT64 ImageAddress; 812 /// 813 /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image. 814 /// (X, Y) display offset of the top left corner of the boot image. 815 /// The top left corner of the display is at offset (0, 0). 816 /// 817 UINT32 ImageOffsetX; 818 /// 819 /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image. 820 /// (X, Y) display offset of the top left corner of the boot image. 821 /// The top left corner of the display is at offset (0, 0). 822 /// 823 UINT32 ImageOffsetY; 824 } 825 /// BGRT Revision 826 enum EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION = 1; 827 /// BGRT Version 828 enum EFI_ACPI_5_1_BGRT_VERSION = 0x01; 829 /// BGRT Status 830 enum EFI_ACPI_5_1_BGRT_STATUS_NOT_DISPLAYED = 0x00; 831 enum EFI_ACPI_5_1_BGRT_STATUS_DISPLAYED = 0x01; 832 /// BGRT Image Type 833 enum EFI_ACPI_5_1_BGRT_IMAGE_TYPE_BMP = 0x00; 834 /// FPDT Version (as defined in ACPI 5.1 spec.) 835 enum EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION = 0x01; 836 /// FPDT Performance Record Types 837 enum EFI_ACPI_5_1_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER = 0x0000; 838 enum EFI_ACPI_5_1_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER = 0x0001; 839 /// FPDT Performance Record Revision 840 enum EFI_ACPI_5_1_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER = 0x01; 841 enum EFI_ACPI_5_1_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER = 0x01; 842 /// FPDT Runtime Performance Record Types 843 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME = 0x0000; 844 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND = 0x0001; 845 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT = 0x0002; 846 /// FPDT Runtime Performance Record Revision 847 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME = 0x01; 848 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND = 0x01; 849 enum EFI_ACPI_5_1_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT = 0x02; 850 /// FPDT Performance Record header 851 struct EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER 852 { 853 align(1): 854 UINT16 Type; 855 UINT8 Length; 856 UINT8 Revision; 857 } 858 /// FPDT Performance Table header 859 struct EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER 860 { 861 align(1): 862 UINT32 Signature; 863 UINT32 Length; 864 } 865 /// FPDT Firmware Basic Boot Performance Pointer Record Structure 866 struct EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD 867 { 868 align(1): 869 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 870 UINT32 Reserved; 871 /// 872 /// 64-bit processor-relative physical address of the Basic Boot Performance Table. 873 /// 874 UINT64 BootPerformanceTablePointer; 875 } 876 /// FPDT S3 Performance Table Pointer Record Structure 877 struct EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD 878 { 879 align(1): 880 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 881 UINT32 Reserved; 882 /// 883 /// 64-bit processor-relative physical address of the S3 Performance Table. 884 /// 885 UINT64 S3PerformanceTablePointer; 886 } 887 /// FPDT Firmware Basic Boot Performance Record Structure 888 struct EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_RECORD 889 { 890 align(1): 891 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 892 UINT32 Reserved; 893 /// 894 /// Timer value logged at the beginning of firmware image execution. 895 /// This may not always be zero or near zero. 896 /// 897 UINT64 ResetEnd; 898 /// 899 /// Timer value logged just prior to loading the OS boot loader into memory. 900 /// For non-UEFI compatible boots, this field must be zero. 901 /// 902 UINT64 OsLoaderLoadImageStart; 903 /// 904 /// Timer value logged just prior to launching the previously loaded OS boot loader image. 905 /// For non-UEFI compatible boots, the timer value logged will be just prior 906 /// to the INT 19h handler invocation. 907 /// 908 UINT64 OsLoaderStartImageStart; 909 /// 910 /// Timer value logged at the point when the OS loader calls the 911 /// ExitBootServices function for UEFI compatible firmware. 912 /// For non-UEFI compatible boots, this field must be zero. 913 /// 914 UINT64 ExitBootServicesEntry; 915 /// 916 /// Timer value logged at the point just prior towhen the OS loader gaining 917 /// control back from calls the ExitBootServices function for UEFI compatible firmware. 918 /// For non-UEFI compatible boots, this field must be zero. 919 /// 920 UINT64 ExitBootServicesExit; 921 } 922 /// FPDT Firmware Basic Boot Performance Table signature 923 enum EFI_ACPI_5_1_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE = SIGNATURE_32('F', 'B', 'P', 924 'T'); 925 struct EFI_ACPI_5_1_FPDT_FIRMWARE_BASIC_BOOT_TABLE 926 { 927 align(1): 928 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 929 // 930 // one or more Performance Records. 931 // 932 } 933 /// FPDT "S3PT" S3 Performance Table 934 enum EFI_ACPI_5_1_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE = SIGNATURE_32('S', '3', 'P', 935 'T'); 936 struct EFI_ACPI_5_1_FPDT_FIRMWARE_S3_BOOT_TABLE 937 { 938 align(1): 939 EFI_ACPI_5_1_FPDT_PERFORMANCE_TABLE_HEADER Header; 940 // 941 // one or more Performance Records. 942 // 943 } 944 /// FPDT Basic S3 Resume Performance Record 945 struct EFI_ACPI_5_1_FPDT_S3_RESUME_RECORD 946 { 947 align(1): 948 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 949 /// 950 /// A count of the number of S3 resume cycles since the last full boot sequence. 951 /// 952 UINT32 ResumeCount; 953 /// 954 /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the 955 /// OS waking vector. Only the most recent resume cycle's time is retained. 956 /// 957 UINT64 FullResume; 958 /// 959 /// Average timer value of all resume cycles logged since the last full boot 960 /// sequence, including the most recent resume. Note that the entire log of 961 /// timer values does not need to be retained in order to calculate this average. 962 /// 963 UINT64 AverageResume; 964 } 965 /// FPDT Basic S3 Suspend Performance Record 966 struct EFI_ACPI_5_1_FPDT_S3_SUSPEND_RECORD 967 { 968 align(1): 969 EFI_ACPI_5_1_FPDT_PERFORMANCE_RECORD_HEADER Header; 970 /// 971 /// Timer value recorded at the OS write to SLP_TYP upon entry to S3. 972 /// Only the most recent suspend cycle's timer value is retained. 973 /// 974 UINT64 SuspendStart; 975 /// 976 /// Timer value recorded at the final firmware write to SLP_TYP (or other 977 /// mechanism) used to trigger hardware entry to S3. 978 /// Only the most recent suspend cycle's timer value is retained. 979 /// 980 UINT64 SuspendEnd; 981 } 982 /// Firmware Performance Record Table definition. 983 struct EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_RECORD_TABLE 984 { 985 align(1): 986 EFI_ACPI_DESCRIPTION_HEADER Header; 987 } 988 /// Generic Timer Description Table definition. 989 struct EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE 990 { 991 align(1): 992 EFI_ACPI_DESCRIPTION_HEADER Header; 993 UINT64 CntControlBasePhysicalAddress; 994 UINT32 Reserved; 995 UINT32 SecurePL1TimerGSIV; 996 UINT32 SecurePL1TimerFlags; 997 UINT32 NonSecurePL1TimerGSIV; 998 UINT32 NonSecurePL1TimerFlags; 999 UINT32 VirtualTimerGSIV; 1000 UINT32 VirtualTimerFlags; 1001 UINT32 NonSecurePL2TimerGSIV; 1002 UINT32 NonSecurePL2TimerFlags; 1003 UINT64 CntReadBasePhysicalAddress; 1004 UINT32 PlatformTimerCount; 1005 UINT32 PlatformTimerOffset; 1006 } 1007 /// GTDT Version (as defined in ACPI 5.1 spec.) 1008 enum EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION = 0x02; 1009 /// Timer Flags. All other bits are reserved and must be 0. 1010 enum EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE = BIT0; 1011 enum EFI_ACPI_5_1_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY = BIT1; 1012 enum EFI_ACPI_5_1_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY = BIT2; 1013 /// Platform Timer Type 1014 enum EFI_ACPI_5_1_GTDT_GT_BLOCK = 0; 1015 enum EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG = 1; 1016 /// GT Block Structure 1017 struct EFI_ACPI_5_1_GTDT_GT_BLOCK_STRUCTURE 1018 { 1019 align(1): 1020 UINT8 Type; 1021 UINT16 Length; 1022 UINT8 Reserved; 1023 UINT64 CntCtlBase; 1024 UINT32 GTBlockTimerCount; 1025 UINT32 GTBlockTimerOffset; 1026 } 1027 /// GT Block Timer Structure 1028 struct EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_STRUCTURE 1029 { 1030 align(1): 1031 UINT8 GTFrameNumber; 1032 UINT8[3] Reserved; 1033 UINT64 CntBaseX; 1034 UINT64 CntEL0BaseX; 1035 UINT32 GTxPhysicalTimerGSIV; 1036 UINT32 GTxPhysicalTimerFlags; 1037 UINT32 GTxVirtualTimerGSIV; 1038 UINT32 GTxVirtualTimerFlags; 1039 UINT32 GTxCommonFlags; 1040 } 1041 /// GT Block Physical Timers and Virtual Timers Flags. All other bits are reserved and must be 0. 1042 enum EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE = BIT0; 1043 enum EFI_ACPI_5_1_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY = BIT1; 1044 /// Common Flags Flags. All other bits are reserved and must be 0. 1045 enum EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER = BIT0; 1046 enum EFI_ACPI_5_1_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY = BIT1; 1047 /// SBSA Generic Watchdog Structure 1048 struct EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_STRUCTURE 1049 { 1050 align(1): 1051 UINT8 Type; 1052 UINT16 Length; 1053 UINT8 Reserved; 1054 UINT64 RefreshFramePhysicalAddress; 1055 UINT64 WatchdogControlFramePhysicalAddress; 1056 UINT32 WatchdogTimerGSIV; 1057 UINT32 WatchdogTimerFlags; 1058 } 1059 /// SBSA Generic Watchdog Timer Flags. All other bits are reserved and must be 0. 1060 enum EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE = BIT0; 1061 enum EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY = BIT1; 1062 enum EFI_ACPI_5_1_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_SECURE_TIMER = BIT2; 1063 /// Boot Error Record Table (BERT) 1064 struct EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_HEADER 1065 { 1066 align(1): 1067 EFI_ACPI_DESCRIPTION_HEADER Header; 1068 UINT32 BootErrorRegionLength; 1069 UINT64 BootErrorRegion; 1070 } 1071 /// BERT Version (as defined in ACPI 5.1 spec.) 1072 enum EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_REVISION = 0x01; 1073 /// Boot Error Region Block Status Definition 1074 struct EFI_ACPI_5_1_ERROR_BLOCK_STATUS 1075 { 1076 align(1): 1077 mixin(bitfields!(UINT32, "UncorrectableErrorValid", 1, UINT32, 1078 "CorrectableErrorValid", 1, UINT32, "MultipleUncorrectableErrors", 1, 1079 UINT32, "MultipleCorrectableErrors", 1, UINT32, "ErrorDataEntryCount", 1080 10, UINT32, "Reserved", 18)); 1081 } 1082 /// Boot Error Region Definition 1083 struct EFI_ACPI_5_1_BOOT_ERROR_REGION_STRUCTURE 1084 { 1085 align(1): 1086 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1087 UINT32 RawDataOffset; 1088 UINT32 RawDataLength; 1089 UINT32 DataLength; 1090 UINT32 ErrorSeverity; 1091 } 1092 1093 enum EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTABLE = 0x00; 1094 enum EFI_ACPI_5_1_ERROR_SEVERITY_FATAL = 0x01; 1095 enum EFI_ACPI_5_1_ERROR_SEVERITY_CORRECTED = 0x02; 1096 enum EFI_ACPI_5_1_ERROR_SEVERITY_NONE = 0x03; 1097 /// Generic Error Data Entry Definition 1098 struct EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_STRUCTURE 1099 { 1100 align(1): 1101 UINT8[16] SectionType; 1102 UINT32 ErrorSeverity; 1103 UINT16 Revision; 1104 UINT8 ValidationBits; 1105 UINT8 Flags; 1106 UINT32 ErrorDataLength; 1107 UINT8[16] FruId; 1108 UINT8[20] FruText; 1109 } 1110 /// Generic Error Data Entry Version (as defined in ACPI 5.1 spec.) 1111 enum EFI_ACPI_5_1_GENERIC_ERROR_DATA_ENTRY_REVISION = 0x0201; 1112 /// HEST - Hardware Error Source Table 1113 struct EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_HEADER 1114 { 1115 align(1): 1116 EFI_ACPI_DESCRIPTION_HEADER Header; 1117 UINT32 ErrorSourceCount; 1118 } 1119 /// HEST Version (as defined in ACPI 5.1 spec.) 1120 enum EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_REVISION = 0x01; 1121 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION = 0x00; 1122 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK = 0x01; 1123 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR = 0x02; 1124 enum EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER = 0x06; 1125 enum EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER = 0x07; 1126 enum EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER = 0x08; 1127 enum EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR = 0x09; 1128 enum EFI_ACPI_5_1_ERROR_SOURCE_FLAG_FIRMWARE_FIRST = (1 << 0); 1129 enum EFI_ACPI_5_1_ERROR_SOURCE_FLAG_GLOBAL = (1 << 1); 1130 /// IA-32 Architecture Machine Check Exception Structure Definition 1131 struct EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE 1132 { 1133 align(1): 1134 UINT16 Type; 1135 UINT16 SourceId; 1136 UINT8[2] Reserved0; 1137 UINT8 Flags; 1138 UINT8 Enabled; 1139 UINT32 NumberOfRecordsToPreAllocate; 1140 UINT32 MaxSectionsPerRecord; 1141 UINT64 GlobalCapabilityInitData; 1142 UINT64 GlobalControlInitData; 1143 UINT8 NumberOfHardwareBanks; 1144 UINT8[7] Reserved1; 1145 } 1146 /// IA-32 Architecture Machine Check Bank Structure Definition 1147 struct EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE 1148 { 1149 align(1): 1150 UINT8 BankNumber; 1151 UINT8 ClearStatusOnInitialization; 1152 UINT8 StatusDataFormat; 1153 UINT8 Reserved0; 1154 UINT32 ControlRegisterMsrAddress; 1155 UINT64 ControlInitData; 1156 UINT32 StatusRegisterMsrAddress; 1157 UINT32 AddressRegisterMsrAddress; 1158 UINT32 MiscRegisterMsrAddress; 1159 } 1160 /// IA-32 Architecture Machine Check Bank Structure MCA data format 1161 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32 = 0x00; 1162 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64 = 0x01; 1163 enum EFI_ACPI_5_1_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64 = 0x02; 1164 enum EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_POLLED = 0x00; 1165 enum EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT = 0x01; 1166 enum EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT = 0x02; 1167 enum EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_SCI = 0x03; 1168 enum EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_NMI = 0x04; 1169 /// Hardware Error Notification Configuration Write Enable Structure Definition 1170 struct EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE 1171 { 1172 align(1): 1173 mixin(bitfields!(UINT16, "Type", 1, UINT16, "PollInterval", 1, UINT16, 1174 "SwitchToPollingThresholdValue", 1, UINT16, 1175 "SwitchToPollingThresholdWindow", 1, UINT16, "ErrorThresholdValue", 1, 1176 UINT16, "ErrorThresholdWindow", 1, UINT16, "Reserved", 10)); 1177 } 1178 /// Hardware Error Notification Structure Definition 1179 struct EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE 1180 { 1181 align(1): 1182 UINT8 Type; 1183 UINT8 Length; 1184 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE ConfigurationWriteEnable; 1185 UINT32 PollInterval; 1186 UINT32 Vector; 1187 UINT32 SwitchToPollingThresholdValue; 1188 UINT32 SwitchToPollingThresholdWindow; 1189 UINT32 ErrorThresholdValue; 1190 UINT32 ErrorThresholdWindow; 1191 } 1192 /// IA-32 Architecture Corrected Machine Check Structure Definition 1193 struct EFI_ACPI_5_1_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE 1194 { 1195 align(1): 1196 UINT16 Type; 1197 UINT16 SourceId; 1198 UINT8[2] Reserved0; 1199 UINT8 Flags; 1200 UINT8 Enabled; 1201 UINT32 NumberOfRecordsToPreAllocate; 1202 UINT32 MaxSectionsPerRecord; 1203 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1204 UINT8 NumberOfHardwareBanks; 1205 UINT8[3] Reserved1; 1206 } 1207 /// IA-32 Architecture NMI Error Structure Definition 1208 struct EFI_ACPI_5_1_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE 1209 { 1210 align(1): 1211 UINT16 Type; 1212 UINT16 SourceId; 1213 UINT8[2] Reserved0; 1214 UINT32 NumberOfRecordsToPreAllocate; 1215 UINT32 MaxSectionsPerRecord; 1216 UINT32 MaxRawDataLength; 1217 } 1218 /// PCI Express Root Port AER Structure Definition 1219 struct EFI_ACPI_5_1_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE 1220 { 1221 align(1): 1222 UINT16 Type; 1223 UINT16 SourceId; 1224 UINT8[2] Reserved0; 1225 UINT8 Flags; 1226 UINT8 Enabled; 1227 UINT32 NumberOfRecordsToPreAllocate; 1228 UINT32 MaxSectionsPerRecord; 1229 UINT32 Bus; 1230 UINT16 Device; 1231 UINT16 Function; 1232 UINT16 DeviceControl; 1233 UINT8[2] Reserved1; 1234 UINT32 UncorrectableErrorMask; 1235 UINT32 UncorrectableErrorSeverity; 1236 UINT32 CorrectableErrorMask; 1237 UINT32 AdvancedErrorCapabilitiesAndControl; 1238 UINT32 RootErrorCommand; 1239 } 1240 /// PCI Express Device AER Structure Definition 1241 struct EFI_ACPI_5_1_PCI_EXPRESS_DEVICE_AER_STRUCTURE 1242 { 1243 align(1): 1244 UINT16 Type; 1245 UINT16 SourceId; 1246 UINT8[2] Reserved0; 1247 UINT8 Flags; 1248 UINT8 Enabled; 1249 UINT32 NumberOfRecordsToPreAllocate; 1250 UINT32 MaxSectionsPerRecord; 1251 UINT32 Bus; 1252 UINT16 Device; 1253 UINT16 Function; 1254 UINT16 DeviceControl; 1255 UINT8[2] Reserved1; 1256 UINT32 UncorrectableErrorMask; 1257 UINT32 UncorrectableErrorSeverity; 1258 UINT32 CorrectableErrorMask; 1259 UINT32 AdvancedErrorCapabilitiesAndControl; 1260 } 1261 /// PCI Express Bridge AER Structure Definition 1262 struct EFI_ACPI_5_1_PCI_EXPRESS_BRIDGE_AER_STRUCTURE 1263 { 1264 align(1): 1265 UINT16 Type; 1266 UINT16 SourceId; 1267 UINT8[2] Reserved0; 1268 UINT8 Flags; 1269 UINT8 Enabled; 1270 UINT32 NumberOfRecordsToPreAllocate; 1271 UINT32 MaxSectionsPerRecord; 1272 UINT32 Bus; 1273 UINT16 Device; 1274 UINT16 Function; 1275 UINT16 DeviceControl; 1276 UINT8[2] Reserved1; 1277 UINT32 UncorrectableErrorMask; 1278 UINT32 UncorrectableErrorSeverity; 1279 UINT32 CorrectableErrorMask; 1280 UINT32 AdvancedErrorCapabilitiesAndControl; 1281 UINT32 SecondaryUncorrectableErrorMask; 1282 UINT32 SecondaryUncorrectableErrorSeverity; 1283 UINT32 SecondaryAdvancedErrorCapabilitiesAndControl; 1284 } 1285 /// Generic Hardware Error Source Structure Definition 1286 struct EFI_ACPI_5_1_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE 1287 { 1288 align(1): 1289 UINT16 Type; 1290 UINT16 SourceId; 1291 UINT16 RelatedSourceId; 1292 UINT8 Flags; 1293 UINT8 Enabled; 1294 UINT32 NumberOfRecordsToPreAllocate; 1295 UINT32 MaxSectionsPerRecord; 1296 UINT32 MaxRawDataLength; 1297 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE ErrorStatusAddress; 1298 EFI_ACPI_5_1_HARDWARE_ERROR_NOTIFICATION_STRUCTURE NotificationStructure; 1299 UINT32 ErrorStatusBlockLength; 1300 } 1301 /// Generic Error Status Definition 1302 struct EFI_ACPI_5_1_GENERIC_ERROR_STATUS_STRUCTURE 1303 { 1304 align(1): 1305 EFI_ACPI_5_1_ERROR_BLOCK_STATUS BlockStatus; 1306 UINT32 RawDataOffset; 1307 UINT32 RawDataLength; 1308 UINT32 DataLength; 1309 UINT32 ErrorSeverity; 1310 } 1311 /// ERST - Error Record Serialization Table 1312 struct EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_HEADER 1313 { 1314 align(1): 1315 EFI_ACPI_DESCRIPTION_HEADER Header; 1316 UINT32 SerializationHeaderSize; 1317 UINT8[4] Reserved0; 1318 UINT32 InstructionEntryCount; 1319 } 1320 /// ERST Version (as defined in ACPI 5.1 spec.) 1321 enum EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_REVISION = 0x01; 1322 /// ERST Serialization Actions 1323 enum EFI_ACPI_5_1_ERST_BEGIN_WRITE_OPERATION = 0x00; 1324 enum EFI_ACPI_5_1_ERST_BEGIN_READ_OPERATION = 0x01; 1325 enum EFI_ACPI_5_1_ERST_BEGIN_CLEAR_OPERATION = 0x02; 1326 enum EFI_ACPI_5_1_ERST_END_OPERATION = 0x03; 1327 enum EFI_ACPI_5_1_ERST_SET_RECORD_OFFSET = 0x04; 1328 enum EFI_ACPI_5_1_ERST_EXECUTE_OPERATION = 0x05; 1329 enum EFI_ACPI_5_1_ERST_CHECK_BUSY_STATUS = 0x06; 1330 enum EFI_ACPI_5_1_ERST_GET_COMMAND_STATUS = 0x07; 1331 enum EFI_ACPI_5_1_ERST_GET_RECORD_IDENTIFIER = 0x08; 1332 enum EFI_ACPI_5_1_ERST_SET_RECORD_IDENTIFIER = 0x09; 1333 enum EFI_ACPI_5_1_ERST_GET_RECORD_COUNT = 0x0A; 1334 enum EFI_ACPI_5_1_ERST_BEGIN_DUMMY_WRITE_OPERATION = 0x0B; 1335 enum EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE = 0x0D; 1336 enum EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH = 0x0E; 1337 enum EFI_ACPI_5_1_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES = 0x0F; 1338 /// ERST Action Command Status 1339 enum EFI_ACPI_5_1_ERST_STATUS_SUCCESS = 0x00; 1340 enum EFI_ACPI_5_1_ERST_STATUS_NOT_ENOUGH_SPACE = 0x01; 1341 enum EFI_ACPI_5_1_ERST_STATUS_HARDWARE_NOT_AVAILABLE = 0x02; 1342 enum EFI_ACPI_5_1_ERST_STATUS_FAILED = 0x03; 1343 enum EFI_ACPI_5_1_ERST_STATUS_RECORD_STORE_EMPTY = 0x04; 1344 enum EFI_ACPI_5_1_ERST_STATUS_RECORD_NOT_FOUND = 0x05; 1345 /// ERST Serialization Instructions 1346 enum EFI_ACPI_5_1_ERST_READ_REGISTER = 0x00; 1347 enum EFI_ACPI_5_1_ERST_READ_REGISTER_VALUE = 0x01; 1348 enum EFI_ACPI_5_1_ERST_WRITE_REGISTER = 0x02; 1349 enum EFI_ACPI_5_1_ERST_WRITE_REGISTER_VALUE = 0x03; 1350 enum EFI_ACPI_5_1_ERST_NOOP = 0x04; 1351 enum EFI_ACPI_5_1_ERST_LOAD_VAR1 = 0x05; 1352 enum EFI_ACPI_5_1_ERST_LOAD_VAR2 = 0x06; 1353 enum EFI_ACPI_5_1_ERST_STORE_VAR1 = 0x07; 1354 enum EFI_ACPI_5_1_ERST_ADD = 0x08; 1355 enum EFI_ACPI_5_1_ERST_SUBTRACT = 0x09; 1356 enum EFI_ACPI_5_1_ERST_ADD_VALUE = 0x0A; 1357 enum EFI_ACPI_5_1_ERST_SUBTRACT_VALUE = 0x0B; 1358 enum EFI_ACPI_5_1_ERST_STALL = 0x0C; 1359 enum EFI_ACPI_5_1_ERST_STALL_WHILE_TRUE = 0x0D; 1360 enum EFI_ACPI_5_1_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE = 0x0E; 1361 enum EFI_ACPI_5_1_ERST_GOTO = 0x0F; 1362 enum EFI_ACPI_5_1_ERST_SET_SRC_ADDRESS_BASE = 0x10; 1363 enum EFI_ACPI_5_1_ERST_SET_DST_ADDRESS_BASE = 0x11; 1364 enum EFI_ACPI_5_1_ERST_MOVE_DATA = 0x12; 1365 /// ERST Instruction Flags 1366 enum EFI_ACPI_5_1_ERST_PRESERVE_REGISTER = 0x01; 1367 /// ERST Serialization Instruction Entry 1368 struct EFI_ACPI_5_1_ERST_SERIALIZATION_INSTRUCTION_ENTRY 1369 { 1370 align(1): 1371 UINT8 SerializationAction; 1372 UINT8 Instruction; 1373 UINT8 Flags; 1374 UINT8 Reserved0; 1375 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1376 UINT64 Value; 1377 UINT64 Mask; 1378 } 1379 /// EINJ - Error Injection Table 1380 struct EFI_ACPI_5_1_ERROR_INJECTION_TABLE_HEADER 1381 { 1382 align(1): 1383 EFI_ACPI_DESCRIPTION_HEADER Header; 1384 UINT32 InjectionHeaderSize; 1385 UINT8 InjectionFlags; 1386 UINT8[3] Reserved0; 1387 UINT32 InjectionEntryCount; 1388 } 1389 /// EINJ Version (as defined in ACPI 5.1 spec.) 1390 enum EFI_ACPI_5_1_ERROR_INJECTION_TABLE_REVISION = 0x01; 1391 /// EINJ Error Injection Actions 1392 enum EFI_ACPI_5_1_EINJ_BEGIN_INJECTION_OPERATION = 0x00; 1393 enum EFI_ACPI_5_1_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE = 0x01; 1394 enum EFI_ACPI_5_1_EINJ_SET_ERROR_TYPE = 0x02; 1395 enum EFI_ACPI_5_1_EINJ_GET_ERROR_TYPE = 0x03; 1396 enum EFI_ACPI_5_1_EINJ_END_OPERATION = 0x04; 1397 enum EFI_ACPI_5_1_EINJ_EXECUTE_OPERATION = 0x05; 1398 enum EFI_ACPI_5_1_EINJ_CHECK_BUSY_STATUS = 0x06; 1399 enum EFI_ACPI_5_1_EINJ_GET_COMMAND_STATUS = 0x07; 1400 enum EFI_ACPI_5_1_EINJ_TRIGGER_ERROR = 0xFF; 1401 /// EINJ Action Command Status 1402 enum EFI_ACPI_5_1_EINJ_STATUS_SUCCESS = 0x00; 1403 enum EFI_ACPI_5_1_EINJ_STATUS_UNKNOWN_FAILURE = 0x01; 1404 enum EFI_ACPI_5_1_EINJ_STATUS_INVALID_ACCESS = 0x02; 1405 /// EINJ Error Type Definition 1406 enum EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_CORRECTABLE = (1 << 0); 1407 enum EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL = (1 << 1); 1408 enum EFI_ACPI_5_1_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL = (1 << 2); 1409 enum EFI_ACPI_5_1_EINJ_ERROR_MEMORY_CORRECTABLE = (1 << 3); 1410 enum EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL = (1 << 4); 1411 enum EFI_ACPI_5_1_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL = (1 << 5); 1412 enum EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE = (1 << 6); 1413 enum EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL = (1 << 7); 1414 enum EFI_ACPI_5_1_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL = (1 << 8); 1415 enum EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_CORRECTABLE = (1 << 9); 1416 enum EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL = (1 << 10); 1417 enum EFI_ACPI_5_1_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL = (1 << 11); 1418 /// EINJ Injection Instructions 1419 enum EFI_ACPI_5_1_EINJ_READ_REGISTER = 0x00; 1420 enum EFI_ACPI_5_1_EINJ_READ_REGISTER_VALUE = 0x01; 1421 enum EFI_ACPI_5_1_EINJ_WRITE_REGISTER = 0x02; 1422 enum EFI_ACPI_5_1_EINJ_WRITE_REGISTER_VALUE = 0x03; 1423 enum EFI_ACPI_5_1_EINJ_NOOP = 0x04; 1424 /// EINJ Instruction Flags 1425 enum EFI_ACPI_5_1_EINJ_PRESERVE_REGISTER = 0x01; 1426 /// EINJ Injection Instruction Entry 1427 struct EFI_ACPI_5_1_EINJ_INJECTION_INSTRUCTION_ENTRY 1428 { 1429 align(1): 1430 UINT8 InjectionAction; 1431 UINT8 Instruction; 1432 UINT8 Flags; 1433 UINT8 Reserved0; 1434 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE RegisterRegion; 1435 UINT64 Value; 1436 UINT64 Mask; 1437 } 1438 /// EINJ Trigger Action Table 1439 struct EFI_ACPI_5_1_EINJ_TRIGGER_ACTION_TABLE 1440 { 1441 align(1): 1442 UINT32 HeaderSize; 1443 UINT32 Revision; 1444 UINT32 TableSize; 1445 UINT32 EntryCount; 1446 } 1447 /// Platform Communications Channel Table (PCCT) 1448 struct EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER 1449 { 1450 align(1): 1451 EFI_ACPI_DESCRIPTION_HEADER Header; 1452 UINT32 Flags; 1453 UINT64 Reserved; 1454 } 1455 /// PCCT Version (as defined in ACPI 5.1 spec.) 1456 enum EFI_ACPI_5_1_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION = 0x01; 1457 /// PCCT Global Flags 1458 enum EFI_ACPI_5_1_PCCT_FLAGS_SCI_DOORBELL = BIT0; 1459 enum EFI_ACPI_5_1_PCCT_SUBSPACE_TYPE_GENERIC = 0x00; 1460 /// PCC Subspace Structure Header 1461 struct EFI_ACPI_5_1_PCCT_SUBSPACE_HEADER 1462 { 1463 align(1): 1464 UINT8 Type; 1465 UINT8 Length; 1466 } 1467 /// Generic Communications Subspace Structure 1468 struct EFI_ACPI_5_1_PCCT_SUBSPACE_GENERIC 1469 { 1470 align(1): 1471 UINT8 Type; 1472 UINT8 Length; 1473 UINT8[6] Reserved; 1474 UINT64 BaseAddress; 1475 UINT64 AddressLength; 1476 EFI_ACPI_5_1_GENERIC_ADDRESS_STRUCTURE DoorbellRegister; 1477 UINT64 DoorbellPreserve; 1478 UINT64 DoorbellWrite; 1479 UINT32 NominalLatency; 1480 UINT32 MaximumPeriodicAccessRate; 1481 UINT16 MinimumRequestTurnaroundTime; 1482 } 1483 /// Generic Communications Channel Shared Memory Region 1484 struct EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND 1485 { 1486 align(1): 1487 UINT8 Command; 1488 mixin(bitfields!(UINT8, "Reserved", 7, UINT8, "GenerateSci", 1)); 1489 } 1490 1491 struct EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS 1492 { 1493 align(1): 1494 mixin(bitfields!(UINT8, "CommandComplete", 1, UINT8, "SciDoorbell", 1, 1495 UINT8, "Error", 1, UINT8, "PlatformNotification", 1, UINT8, "Reserved", 4)); 1496 UINT8 Reserved1; 1497 } 1498 1499 struct EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER 1500 { 1501 align(1): 1502 UINT32 Signature; 1503 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND Command; 1504 EFI_ACPI_5_1_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS Status; 1505 } 1506 /// "RSD PTR " Root System Description Pointer 1507 enum EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE = SIGNATURE_64('R', 1508 'S', 'D', ' ', 'P', 'T', 'R', ' '); 1509 /// "APIC" Multiple APIC Description Table 1510 enum EFI_ACPI_5_1_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('A', 'P', 1511 'I', 'C'); 1512 /// "BERT" Boot Error Record Table 1513 enum EFI_ACPI_5_1_BOOT_ERROR_RECORD_TABLE_SIGNATURE = SIGNATURE_32('B', 'E', 'R', 'T'); 1514 /// "BGRT" Boot Graphics Resource Table 1515 enum EFI_ACPI_5_1_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('B', 'G', 'R', 1516 'T'); 1517 /// "CPEP" Corrected Platform Error Polling Table 1518 enum EFI_ACPI_5_1_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE = SIGNATURE_32( 1519 'C', 'P', 'E', 'P'); 1520 /// "DSDT" Differentiated System Description Table 1521 enum EFI_ACPI_5_1_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 1522 'D', 'S', 'D', 'T'); 1523 /// "ECDT" Embedded Controller Boot Resources Table 1524 enum EFI_ACPI_5_1_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE = SIGNATURE_32( 1525 'E', 'C', 'D', 'T'); 1526 /// "EINJ" Error Injection Table 1527 enum EFI_ACPI_5_1_ERROR_INJECTION_TABLE_SIGNATURE = SIGNATURE_32('E', 'I', 'N', 'J'); 1528 /// "ERST" Error Record Serialization Table 1529 enum EFI_ACPI_5_1_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE = SIGNATURE_32('E', 'R', 1530 'S', 'T'); 1531 /// "FACP" Fixed ACPI Description Table 1532 enum EFI_ACPI_5_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('F', 'A', 'C', 1533 'P'); 1534 /// "FACS" Firmware ACPI Control Structure 1535 enum EFI_ACPI_5_1_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE = SIGNATURE_32('F', 'A', 1536 'C', 'S'); 1537 /// "FPDT" Firmware Performance Data Table 1538 enum EFI_ACPI_5_1_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE = SIGNATURE_32('F', 'P', 1539 'D', 'T'); 1540 /// "GTDT" Generic Timer Description Table 1541 enum EFI_ACPI_5_1_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('G', 'T', 1542 'D', 'T'); 1543 /// "HEST" Hardware Error Source Table 1544 enum EFI_ACPI_5_1_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE = SIGNATURE_32('H', 'E', 'S', 1545 'T'); 1546 /// "MPST" Memory Power State Table 1547 enum EFI_ACPI_5_1_MEMORY_POWER_STATE_TABLE_SIGNATURE = SIGNATURE_32('M', 'P', 'S', 1548 'T'); 1549 /// "MSCT" Maximum System Characteristics Table 1550 enum EFI_ACPI_5_1_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE = SIGNATURE_32('M', 1551 'S', 'C', 'T'); 1552 /// "PMTT" Platform Memory Topology Table 1553 enum EFI_ACPI_5_1_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE = SIGNATURE_32('P', 'M', 1554 'T', 'T'); 1555 /// "PSDT" Persistent System Description Table 1556 enum EFI_ACPI_5_1_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('P', 1557 'S', 'D', 'T'); 1558 /// "RASF" ACPI RAS Feature Table 1559 enum EFI_ACPI_5_1_ACPI_RAS_FEATURE_TABLE_SIGNATURE = SIGNATURE_32('R', 'A', 'S', 'F'); 1560 /// "RSDT" Root System Description Table 1561 enum EFI_ACPI_5_1_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('R', 'S', 1562 'D', 'T'); 1563 /// "SBST" Smart Battery Specification Table 1564 enum EFI_ACPI_5_1_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'B', 1565 'S', 'T'); 1566 /// "SLIT" System Locality Information Table 1567 enum EFI_ACPI_5_1_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE = SIGNATURE_32('S', 'L', 1568 'I', 'T'); 1569 /// "SRAT" System Resource Affinity Table 1570 enum EFI_ACPI_5_1_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE = SIGNATURE_32('S', 'R', 1571 'A', 'T'); 1572 /// "SSDT" Secondary System Description Table 1573 enum EFI_ACPI_5_1_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('S', 1574 'S', 'D', 'T'); 1575 /// "XSDT" Extended System Description Table 1576 enum EFI_ACPI_5_1_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('X', 'S', 1577 'D', 'T'); 1578 /// "BOOT" MS Simple Boot Spec 1579 enum EFI_ACPI_5_1_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE = SIGNATURE_32('B', 'O', 'O', 'T'); 1580 /// "CSRT" MS Core System Resource Table 1581 enum EFI_ACPI_5_1_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('C', 'S', 'R', 1582 'T'); 1583 /// "DBG2" MS Debug Port 2 Spec 1584 enum EFI_ACPI_5_1_DEBUG_PORT_2_TABLE_SIGNATURE = SIGNATURE_32('D', 'B', 'G', '2'); 1585 /// "DBGP" MS Debug Port Spec 1586 enum EFI_ACPI_5_1_DEBUG_PORT_TABLE_SIGNATURE = SIGNATURE_32('D', 'B', 'G', 'P'); 1587 /// "DMAR" DMA Remapping Table 1588 enum EFI_ACPI_5_1_DMA_REMAPPING_TABLE_SIGNATURE = SIGNATURE_32('D', 'M', 'A', 'R'); 1589 /// "DRTM" Dynamic Root of Trust for Measurement Table 1590 enum EFI_ACPI_5_1_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE = SIGNATURE_32( 1591 'D', 'R', 'T', 'M'); 1592 /// "ETDT" Event Timer Description Table 1593 enum EFI_ACPI_5_1_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32('E', 'T', 1594 'D', 'T'); 1595 /// "HPET" IA-PC High Precision Event Timer Table 1596 enum EFI_ACPI_5_1_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE = SIGNATURE_32('H', 'P', 1597 'E', 'T'); 1598 /// "iBFT" iSCSI Boot Firmware Table 1599 enum EFI_ACPI_5_1_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE = SIGNATURE_32('i', 'B', 'F', 1600 'T'); 1601 /// "IVRS" I/O Virtualization Reporting Structure 1602 enum EFI_ACPI_5_1_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE = SIGNATURE_32('I', 1603 'V', 'R', 'S'); 1604 /// "LPIT" Low Power Idle Table 1605 enum EFI_ACPI_5_1_IO_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE = SIGNATURE_32('L', 'P', 1606 'I', 'T'); 1607 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table 1608 enum EFI_ACPI_5_1_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE = SIGNATURE_32( 1609 'M', 'C', 'F', 'G'); 1610 /// "MCHI" Management Controller Host Interface Table 1611 enum EFI_ACPI_5_1_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE = SIGNATURE_32( 1612 'M', 'C', 'H', 'I'); 1613 /// "MSDM" MS Data Management Table 1614 enum EFI_ACPI_5_1_DATA_MANAGEMENT_TABLE_SIGNATURE = SIGNATURE_32('M', 'S', 'D', 'M'); 1615 /// "SLIC" MS Software Licensing Table Specification 1616 enum EFI_ACPI_5_1_SOFTWARE_LICENSING_TABLE_SIGNATURE = SIGNATURE_32('S', 'L', 'I', 1617 'C'); 1618 /// "SPCR" Serial Port Concole Redirection Table 1619 enum EFI_ACPI_5_1_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE = SIGNATURE_32('S', 1620 'P', 'C', 'R'); 1621 /// "SPMI" Server Platform Management Interface Table 1622 enum EFI_ACPI_5_1_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE = SIGNATURE_32( 1623 'S', 'P', 'M', 'I'); 1624 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table 1625 enum EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE = SIGNATURE_32( 1626 'T', 'C', 'P', 'A'); 1627 /// "TPM2" Trusted Computing Platform 1 Table 1628 enum EFI_ACPI_5_1_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE = SIGNATURE_32('T', 1629 'P', 'M', '2'); 1630 /// "UEFI" UEFI ACPI Data Table 1631 enum EFI_ACPI_5_1_UEFI_ACPI_DATA_TABLE_SIGNATURE = SIGNATURE_32('U', 'E', 'F', 'I'); 1632 /// "WAET" Windows ACPI Emulated Devices Table 1633 enum EFI_ACPI_5_1_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE = SIGNATURE_32('W', 1634 'A', 'E', 'T'); 1635 /// "WDAT" Watchdog Action Table 1636 enum EFI_ACPI_5_1_WATCHDOG_ACTION_TABLE_SIGNATURE = SIGNATURE_32('W', 'D', 'A', 'T'); 1637 /// "WDRT" Watchdog Resource Table 1638 enum EFI_ACPI_5_1_WATCHDOG_RESOURCE_TABLE_SIGNATURE = SIGNATURE_32('W', 'D', 'R', 'T'); 1639 /// "WPBT" MS Platform Binary Table 1640 enum EFI_ACPI_5_1_PLATFORM_BINARY_TABLE_SIGNATURE = SIGNATURE_32('W', 'P', 'B', 'T');